3886 datasheet(106/380 Pages) RENESAS

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1-81

3886 Group User’s Manual

HARDWARE

q Program command

Input command code 4016 in the first transfer. Proceed and input

the low-order 8 bits and the high-order 8 bits of the address and

then program data. Programming is initiated at the last rising edge

of the serial clock during program data transfer. The BUSY pin is

driven high during program operation. Programming is completed

within 10

µs as measured by the internal timer, and the BUSY pin

is pulled low.

Note : A programming operation is not completed by executing the

program command once. Always be sure to execute a pro-

gram verify command after executing the program command.

When the failure is found in the verification, the user must re-

peatedly execute the program command until the pass in the

verification. Refer to Figure 73 for the programming flowchart.

q Program verify command

Input command code C016 in the first transfer. Proceed and drive

the OE pin low. When this is done, the M38869FFAHP/GP verify-

reads the programmed address’s contents, and then latches it into

the internal data latch. When the OE pin is released back high and

serial clock is input to the SCLK pin, the verify data that has been

latched into the data latch is serially output from the SDA pin.

Fig. 77 Timings during program verify

Fig. 76 Timings during programming

FUNCTIONAL DESCRIPTION

SCLK

BUSY

SDA

tCH

00000010

A15

tCH

tPC

Command code input (4016)

Program address input (L)

Program address input (H)

Program data input

tWP

Program

SCLK

BUSY

SDA

tCRPV

Command code input (C016)

Verify data output

tWR

Verify read

tRC

Note: When outputting the verify data, the SDA pin is switched for output at the first falling edge of SCLK. The SDA pin is placed

in the floating state during the period of th(C-E) after the last rising edge of SCLK (at the 8th bit).

00000011

“L”

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