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3886 Datasheet(PDF) 208 Page - Renesas Technology Corp

Part # 3886
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  380 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

3886 Datasheet(HTML) 208 Page - Renesas Technology Corp

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3886 Group User’s Manual
APPLICATION
2-91
2.5 Multi-master I2C-BUS interface
➁ Transmission of command
Confirm correct completion of communication at ➀ before command transmission. When receiving
the STOP condition, a process not to transmit a command is required, because the internal I2C-
BUS generates an interrupt request also owing to the STOP condition transmitted to other devices.
After confirming correct completion of communication, write a command to the I2C data shift
register (address 001216).
In case the AL bit (bit 3 of address 001416) is “1”, check the slave address comparison flag (ASS
bit; bit 2 of address 001416) to judge whether the device given a right of master transmission owing
to an arbitration specifies itself as a slave address. When it is “1”, perform the slave reception;
when “0”, wait for a STOP condition occurrence caused by other devices and the communication
completion.
In case the AL bit is “0”, check the last received bit (LRB bit; bit 0 of address 001416). When it is
“1”, make the STOP condition generate and release the bus use, because the specified slave
device does not exist on the I2C-BUS.
Fig. 2.5.20 Transmission process of command
AL (address 1416), bit 3 ?
AAS (address 1416), bit 2 ?
0 (ACK)
0 (not detected)
Stop condition output
S0 (address 1216)
← 000011112
PIN (address 1416), bit 4 ?
1 (error)
0 (slave address transmitted)
LRB (address 1416), bit 0 ?
0(address not corresponded)
1 (NACK)
1 (detected)
1(address corresponded)
End
2
Re-transmission preparation
Slave reception
• Judgment of slave address comparison
• Judgment of bus hold
• Judgment of arbitration lost detection
• ACK confirmation
• Command data write to I2C data shift register



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