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3886 Datasheet(PDF) 214 Page - Renesas Technology Corp |
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3886 Datasheet(HTML) 214 Page - Renesas Technology Corp |
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214 / 380 page  3886 Group User’s Manual APPLICATION 2-97 2.5 Multi-master I2C-BUS interface ➀ Reception of START condition; Transmission of ACK bit due to slave address correspondence In the case of operation as the slave, all processes are performed in the interrupt after setting of the slave reception in the main process, because an interrupt request does not occur until correspondence of a slave address. In the first interrupt, after confirming correspondence of the slave address, write dummy data to receive a command into the I2C data shift register. Fig. 2.5.26 Reception process of START condition and slave address AAS (address 1416), bit 2 ? 1(corresponded) 0(not corresponded) End S0(address 1216) ← 111111112 Error processing PIN (address 1416), bit 4 ? 1(stop condition) 0(slave address received) 1 S1(address 1416) ← 000100002 • Judgment of bus hold • Judgment of slave address correspondence • Slave receive mode set • Dummy data write to I2C data shift register |
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