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3886 Datasheet(PDF) 218 Page - Renesas Technology Corp |
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3886 Datasheet(HTML) 218 Page - Renesas Technology Corp |
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218 / 380 page ![]() 3886 Group User’s Manual APPLICATION 2-101 2.5 Multi-master I2C-BUS interface ➄ Transmission of upper data Confirm correct completion of the upper data transmission. The master returns the NACK toward the transmitted second-byte data, the upper data. Accordingly, confirm that the last received bit (LRB bit; bit 0 of address 001416) is “1”. After that, write dummy data to the I2C data shift register and wait for the interrupt of STOP condition. Fig. 2.5.30 Transmission process of upper data End S0(address 1216) ← 111111112 Error end 0(ACK) LRB (address 1416), bit 0 ? 1(NACK) 5 PIN (address 1416), bit 4 ? 1(stop condition) 0(upper data transmission completed) S1(address 1416) ← 000100002 Note: Use the branch bit instruction to check bus busy. • Judgment of bus hold • ACK confirmation • Slave receive mode set • Dummy data write to I2C data shift register |
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