3886 datasheet(255/380 Pages) RENESAS

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2-138

3886 Group User’s Manual

APPLICATION

2.10 Watchdog timer

Fig. 2.10.3 Structure of CPU mode register

CPU mode register

b7 b6 b5 b4 b3 b2 b1 b0

CPU mode register

(CPUM: address 3B16)

00 : Single-chip mode

01 : Memory expansion mode (Note)

10 : Microprocessor mode (Note)

11 : Not available

Name

Functions

At reset R W

0 : 0 page

1 : 1 page

0: Oscillating

1: Stopped

Processor mode

bits

Stack page

selection bit

Port Xc switch bit

Fix this bit to “1”.

Main clock (XIN-

XOUT) stop bit

Main clock division

ratio selection bits

*: The initial value of bit 1 depends on the CNVss level.

Note: This mode is not available for M38869M8A/MCA/MFA or the

flash memory version.

b1 b0

b7 b6

0 0:

φ=f(XIN)/2

(high-speed mode)

0 1:

φ=f(XIN)/8

(middle-speed mode)

1 0:

φ=f(XCIN)/2

(low-speed mode)

1 1: Not available

0: I/O port function

(oscillation stopped)

1: XCIN-XCOUT oscillation

function

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