7480 datasheet(236/337 Pages) RENESAS

236 / 337 page

7480 Group and 7481 Group User's Manual

2-21

APPLICATIONS

2.3 Serial I/O

Figure 2.3.3 Timing of Interrupt Control

Figure 2.3.4 Control Procedure Example of Serial I/O Transmit

Interrupt disable flag

interrupt request bit

Serial I/O transmit

Write ‘1’

1st byte transmitted

2nd byte transmitted

3rd byte transmitted

4th byte transmitted

5th byte transmitted

1st byte transmitted

2nd byte transmitted

5-byte transmission completed

A B A

B A

Setting of serial I/O

control register

Write ‘0’

Write ‘1’

∗ : Processed within serial I/O transmit interrupt service routine.

: Cleared by the acceptance of serial I/O transmit interrupt request.

: Interrupt request generated with transmitter buffer register emptied.

System is released from reset.

Undefined

Execute CLI

instruction

interrupt enable bit

Serial I/O transmit

Transmission requested

∗∗

∗

Transmission requested

Initialize

Set serial I/O control register (Note 3)

SIOCON (Address 00E216)

BRG count source: f(XIN)/16

Synchronous clock:

BRG output divided by 4

RESET(Note 1)

0 01

Baud rate generator

← 3316 (Note 2)

Transmission requested ?

Transmit interrupt source:

Transmit enabled

Receive disabled

Clock synchronous serial I/O

Serial I/O enabled

Serial I/O transmit interrupt

SRDY output disabled

Serial I/O transmit interrupt service routine

Port P17 = LOW ?

RTI

Transmit buffer register

← BUFF_p(Note 4)

Transmission buffer register is empty.

CLI

SEI

Processing

1 is added to pointer p for BUFF.

← p + 1

≥ 5 ?

Serial I/O transmit interrupt enable bit

← 0

Initialize pointer p for BUFF

← 0

Transmit processing

5-byte transmission data is stored

to buffer area (BUFF)

BUFF_0

← Transmission data 0

Transmission data 1

BUFF_1

←

• • •

BUFF_4

← Transmission data 4 (1st byte)

BUFF: 5-byte buffer area

BUFF_0 to BUFF_4

Port P17 is set to input.

Serial I/O transmit interrupt enable bit

← 1

Notes 1: State after system is released from reset

• Serial I/O transmit interrupt enable bit = 0

• Serial I/O receive interrupt enable bit = 0

2: 3316 = 52–1

3: In this time, serial I/O transmit interrupt request bit is 1.

4: Transmit/receive is started by writing to transmit buffer register.

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