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GL848 Datasheet(PDF) 25 Page - GENESYS LOGIC

Part # GL848
Description  High Speed USB 2.0
PDF  85 Pages
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Manufacturer  GENESYS [GENESYS LOGIC]
Direct Link  http://www.genesyslogic.com
Logo GENESYS - GENESYS LOGIC

GL848 Datasheet(HTML) 25 Page - GENESYS LOGIC

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GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
©2000-2007 Genesys Logic Inc. - All rights reserved.
Page 25
11
System clock*4.
5 EVEN1ST
0
The first pixel of stagger CCD is located at odd sensor line.
1
The first pixel of stagger CCD is located at even sensor line.
4 BLINE1ST
0
The first sensor of CCD is red line.
1
The first sensor of CCD is blue line.
3 BACKSCAN
0
Select forward scanning function.
1
Select backward scanning function.
1 SHORTTG
0
Disable this function.
1
Enable short CCD SH(TG) period for film scanning.
Offset 0Ah …………………………………………..…………..……..………. Default value = 8’h00
X
X
ADFSEL
LPWMEN
X
RS232SEL BAUDRAT1 BAUDRAT0
R/W
R/W
R/W
R/W
X
R/W
R/W
R/W
5 ADFSEL
0
Disable ADF function.
1
Enable ADF function and the specific GPIOs are defined to drive ADF module.
4 LPWMEN
0
Disable ADF function.
1
Enable PWM function of lamp.
2 RS232SEL
0
Disable RS232 interface.
1
Enable RS232 interface for special application and the specific GPIOs are
defined to implement RS232 protocol.
1-0 BAUDRAT [1:0] Set boud rate of RS232.
00
2400bps.
01
4800bps.
10
9600bps.
11
19200bps.
Offset 0Bh …………………………………………..…………..……..………. Default value = 8’h00
CLKSET2
CLKSET1
CLKSET0
RFHDIS
ENBDRAM DRAMSEL2 DRAMSEL1 DRAMSEL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-5 CLKSET [2:0]
To select the system clock frequency.
000
24MHz.
001
30MHz.
010
40MHz.
011
48MHz.
100 60MHz.
101 Reserved.
110 Reserved.
111 Reserved.
4 RFHDIS
0
Enable auto-refresh mode for SDRAM.
1
Enable self-refresh mode for SDRAM.
3 ENBDRAM
A rising edge from low to high: to start power on sequence of SDRAM.
2-0 DRAMSEL [2:0] Select the SDRAM size.
000
Reserved.
001
16M bits.
010
64M bist.
011
128M bits.
100
256M bits.
101
512M bits.
110
1G bits.



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