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TUSB7320 Datasheet(PDF) 88 Page - Texas Instruments |
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TUSB7320 Datasheet(HTML) 88 Page - Texas Instruments |
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88 / 115 page ![]() TUSB7320, TUSB7340 SLLSE76J – MARCH 2011 – REVISED MAY 2012 www.ti.com 6.4.2 Interrupter Management Register The TUSB73X0 implements 8 Interrupter Management Registers, one for each Interrupter implemented. Runtime Base register offset:20h + (20h*Interrupter), where Interrupter = 0 through 7 Register type:Read-Only,Read/Write Default value: 0000 0000h Table 6-42. HC Runtime Register (Runtime Base + 20h + (20h*Interrupter)), where Interrupter = 0 through 7 Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 No. Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 State Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 No. Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 State Table 6-43. Interrupter Management Register Description Bit Field Name Access Description 31:2 RSVD r Reserved. Returns zeros when read. 1 IE rw Interrupt Enable. 0 IP rc Interrupt Pending. 6.4.3 Interrupter Moderation Register The TUSB73X0 implements 8 Interrupter Moderation Registers, one for each Interrupter implemented. Runtime Base register offset:24h + (20h*Interrupter), where Interrupter = 0 through 7 Register type:Read/Write Default value: 0000 0FA0h Table 6-44. HC Runtime Register (Runtime Base + 24h + (20h*Interrupter)), where Interrupter = 0 through 7 Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 No. Reset X X X X X X X X X X X X X X X X State Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 No. Reset 0 0 0 0 1 1 1 1 1 0 1 0 0 0 0 0 State Table 6-45. Interrupter Management Register Description Bit Field Name Access Description 31:16 IMODC rw Interrupt Moderation Counter. 15:0 IMODI rw Interrupt Moderation Interval. 88 xHCI MEMORY MAPPED REGISTER SPACE Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TUSB7320 TUSB7340 |
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