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PCM1861 Datasheet(PDF) 27 Page - Texas Instruments

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Part # PCM1861
Description  PCM186x 110dB 2ch and 4ch Audio ADCs with Universal Front End
PDF  115 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCM1861 Datasheet(HTML) 27 Page - Texas Instruments

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Master Mode Only
MUX
SCK
PLL Clock
Clock
Divider
Audio ADC Clocks
MUX
Clock
Divider
SCK
PLL Clock
DSP #1
MUX
SCK
Clock
Divider
DSP #2
PLL Clock
MUX
Clock
Divider
MUX
Clock
Divider
MUX
PLL Clock
SCK_OUT_TO_GPIO
BCK_i
MUX
BCK OUT IN
MASTER MODE
MUX
PLL
SCK
BCK
XI
XO
SCK
SCK
PLL Source
Select
SCK/ PLL Select
Mux’s
ADC_CLK_SRC
(Page 0 Reg 0x20)
DSP2_CLK_SRC
(Page 0 Reg 0x20)
DSP1_CLK_SRC
(Page 0 Reg 0x20)
Autoset by format
MUX
Clock
Divider
LRCK
LRCK OUT IN
MASTER MODE
CLK_DIV_MST_SCK
(Page 0 Reg 0x26)
CLK_DIV_MST_BCK
(Page 0 Reg 0x27)
SCK_XI_SEL[1:0]
(Page 0 Reg 0x20)
MST_SCK_SRC
(Page 0 Reg 0x20)
PCM1861, PCM1863, PCM1865
www.ti.com
SLAS831C – MARCH 2014 – REVISED AUGUST 2014
8.13.3 Device Clock Distribution and Generation
Figure 28. PCM186x Main Audio Clock Tree and Clock Generation
PLLs are used in all modes to generate the clocks required to run both fixed-function DSPs. The dividers are
automatically configured based on the clock rate detection. The clock architecture above allows non-audio clock
sources to be used as clock sources and the PCM186x to continue to run in a Master mode, providing all
PCM/I2S Clocks for other converters in the system.
8.13.4 PCM186x Clocking Modes
There are four different clocking modes available on the device which can take advantage of the onboard PLL
and clock detection. Advanced clock detection and a smart internal state engine in the PCM186x can
automatically configure the various dividers in the device (shown in Device Clock Distribution and Generation)
with optimized values. Automatic clock configuration is enabled by default, using the register CLKDET_EN
(Page.0, 0x20).
External XTAL/MCK
NAME
Device
BCK, LRCK Direction
PLL Configuration
INPUT
ADC Master Mode
PCM1861/3/5
YES
OUT
Not Required
ADC Slave Mode
PCM1861/3/5
YES
IN
Not Required
Automatic for standard
ADC Slave PLL Mode
PCM1863/5
NO
IN
audio rates
ADC Non-Audio MCK
PCM1863/5
YES
OUT
Manual
Copyright © 2014, Texas Instruments Incorporated
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Product Folder Links: PCM1861 PCM1863 PCM1865



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