ADSP-SC583 datasheet(29/168 Pages) AD

29 / 168 page

Preliminary Technical Data

Rev. PrF

Page 29 of 168

February 2016

ADSP-SC582/583/584/587/589/ADSP-21583/584/587

SYS_FAULT

InOut

Active-High Fault Output. Indicates indicates internal faults or senses external faults depending on

the operating mode.

SYS_FAULT

InOut

Active-Low Fault Output. Indicates indicates internal faults or senses external faults depending on

the operating mode.

SYS_HWRST

Input

Processor Hardware Reset Control. Resets the device when asserted.

SYS_RESOUT

Output

Reset Output. Indicates that the device is in the reset state.

SYS_XTAL0

Output

Crystal Output

SYS_XTAL1

Output

Crystal Output

TM_ACI[n]

Input

Alternate Capture Input n. Provides an additional input for WIDCAP, WATCHDOG, and PININT modes.

TM_ACLK[n]

Input

Alternate Clock n. Provides an additional time base for use by an individual timer.

TM_CLK

Input

Clock. Provides an additional global time base for use by all the GP timers.

TM_TMR[n]

InOut

Timer n. The main input/output signal for each timer.

TRACE_CLK

Output

Trace Clock. Clock output/

TRACE_D[nn]

Output

Trace Data n. Unidirectional data bus.

TWI_SCL

InOut

Serial Clock. Clock output when master, clock input when slave

TWI_SDA

InOut

Serial Data. Receives or transmits data

UART_CTS

Input

Clear to Send. Flow control signal.

UART_RTS

Output

Request to Send. Flow control signal.

UART_RX

Input

Receive. Receive input. Typically connects to a transceiver that meets the electrical requirements of

the device being communicated with.

UART_TX

Output

Transmit. Transmit output. Typically connects to a transceiver that meets the electrical requirements

of the device being communicated with.

USB_CLKIN

Input

Clock/Crystal Input. This clock input is multiplied by a PLL to form the USB clock. See data sheet

specifications for frequency/tolerance information.

USB_DM

InOut

Data –. Bidirectional differential data line

USB_DP

InOut

Data +. Bidirectional differential data line

USB_ID

Input

OTG ID. Senses whether the controller is a host or device. This signal is pulled low when an A-type

plug is sensed (signifying that the USB controller is the A device), but the input is high when a B-type

plug is sensed (signifying that the USB controller is the B device).

USB_VBC

Output

VBUS Control. Controls an external voltage source to supply VBUS when in host mode. May be

configured as open-drain. Polarity is configurable as well.

USB_VBUS

InOut

Bus Voltage. Connects to bus voltage in host and device modes.

USB_XTAL

Output

Crystal. Drives an external crystal. Must be left unconnected if an external clock is driving USB_CLKIN.

Table 11. ADSP-SC58x/ADSP-2158x Detailed Signal Descriptions (Continued)

Signal Name

Direction

Description

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