DP83932C datasheet(17/98 Pages) NSC

17 / 98 page

30 Buffer Management (Continued)

343 Receive Descriptor Area (RDA)

After the SONIC buffers a packet to memory it writes 6

words of status and control information into the RDA reads

the link field to the next receive descriptor and writes to the

in-use field of the current descriptor In 32-bit mode the

upper word Dk3116l is not used This unused area in

memory should not be used for other purposes since the

SONIC may still write into these locations Each receive de-

scriptor consists of the following sections (

Figure 3-5 )

TLF10492 – 14

FIGURE 3-5 Receive Descriptor Format

receive status

indicates status of the received packet The

SONIC writes the Receive Control register into this field

Figure 3-6 shows the receive status format This field is

loaded from the contents of the Receive Control register

Note that ERR RNT BRD PRO and AMC are configura-

tion bits and are programmed during initialization See Sec-

tion 433 for the description of the Receive Control register

ERR

RNT

BRD

PRO

AMC

LB1

LB0

LPKT

CRS

COL

CRCR

FAER

LBK

PRX

FIGURE 3-6 Receive Status Format

byte count

gives the length of the complete packet from

the start of Destination Address to the end of FCS

packet pointer

a 32-bit pointer that locates the packet in

the RBA The SONIC writes the contents of the CRBA01

registers into this field

sequence numbers

this field displays the contents of two

8-bit counters (modulo 256) that sequence the RBAs used

and the packets buffered These counters assist the system

in determining when an RBA has been completely process-

ed The sequence numbers allow the system to tally the

packets that have been processed within a particular RBA

There are two sequence numbers that describe a packet

the RBA Sequence Number and the Packet Sequence

Number When a packet is buffered to memory the SONIC

maintains a single RBA Sequence Number for all packets in

an RBA and sequences the Packet Number for succeeding

packets in the RBA When the SONIC uses the next RBA it

increments the RBA Sequence Number and clears the

Packet Sequence Number The RBA’s sequence counter is

not incremented when the read RRA command is issued in

the Command register The format of the Receive Se-

quence Numbers are shown in

Figure 3-7 These counters

are reset during hardware reset or by writing zero to them

RBA Sequence Number

Packet Sequence Number

(Modulo 256)

FIGURE 3-7 Receive Sequence Number Format

receive link field

a 15-bit pointer (A15 – A1) that locates

the next receive descriptor The LSB of this field is the End

Of List (EOL) bit and indicates the last descriptor in the list

(Initialized by the system)

in use field

this field provides a handshake between the

system and the SONIC to indicate the ownership of the de-

scriptor When the system avails a descriptor to the SONIC

it writes a non-zero value into this field The SONIC in turn

sets this field to all ‘‘0’s’’ when it has finished processing the

descriptor (That is when the CRDA register has advanced

to the next receive descriptor) Generally the SONIC releas-

es control after writing the status and control information

into the RDA If however the SONIC has reached the last

descriptor in the list it maintains ownership of the descriptor

until the system has appended additional descriptors to the

list The SONIC then relinquishes control after receiving the

next packet (See Section 3461 for details on when the

SONIC writes to this field) The receive packet descriptor

format is shown in

Figure 3-5

344 Receive Buffer Management Initialization

The Receive Resource Descriptor and Buffer areas (RRA

RDA RBA) in memory and the appropriate SONIC registers

must be properly initialized before the SONIC begins buffer-

ing packets This section describes the initialization pro-

cess

3441 Initializing The Descriptor Page

All descriptor areas (RRA RDA and TDA) used by the

SONIC reside within areas up to 32k (word) or 16k (long

word) pages This page may be placed anywhere within the

32-bit address range by loading the upper 16 address lines

into the UTDA URDA and URRA registers

3442 Initializing The RRA

The initialization of the RRA consists of loading the four

SONIC RRA registers and writing the resource descriptor

information to memory

The RRA registers are loaded with the following values

Resource Start Area (RSA) register

The RSA is loaded

with the lower 16-bit address of the beginning of the RRA

Resource End Area (REA) register

The REA is loaded

with the lower 16-bit address of the end of the RRA The

end of the RRA is defined as the address of the last

RXrsrcptr0 field in the RRA plus 4 words in 16-bit mode or 4

long words in 32-bit mode (

Figure 3-3 )

Resource Read Pointer (RRP) register

The RRP is load-

ed with the lower 16-bit address of the first resource de-

scriptor the SONIC reads

Resource Write Pointer (RWP) register

The RWP is load-

ed with the lower 16-bit address of the next vacant location

where a resource descriptor will be placed by the system

Note

The RWP register must only point to either (1) the RXrsrcptr0 field of

one of the RRA Descriptors (2) the memory address that the RSA

points to (the start of the RRA) or (3) the memory address that the

REA points to (the end of the RRA) When the RWP e RRP compari-

son is made it is performed after the complete RRA descriptor has

been read and not during the fetch Failure to set the RWP to any of

the above values prevents the RWP e RRP comparison from ever

becoming true

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