ML7406 datasheet(65/104 Pages) LAPIS

65 / 104 page

FEDL7406-02

ML7406

65/104

The following is timing chart for normal mode.

[IDLE detection case]

[BUSY result case]

[Condition]

ADC_CK_SEL([ADC_CLK_SET: B0 0x08(4)])=0b1 (2MHz)

ED_AVG[2:0] ([ED_CTRL: B0 0x41(2-0)])=0b011 (ED value 8 times average)

IDLE_WAIT[9:0] ([IDLE_WAIT_L/H: B0 0x3C/3B(1-0)])=0b00_0000_0000 (IDLE detection 0μs)

ED value

(internal signal)

CCA_RSLT[1:0]

[CCA_CTRL: B0 0x39(1-0)]

INT[18] (CCA completion)

[INT_SOURCE_GRP3: B0 0x0F(2)]

CCA_EN

[CCA_CTRL: B0 0x39(4)]

ED_VALUE[7:0]

[ED_RSLT: B0 0x3A]

AD conversion(16μs)

ED value average period (16μsec×8=128μs)

0b10 (CCA on-going)

ED1

ED3

ED5

ED2

ED6

ED7

(0-7)

0b00 (IDLE)

averaging

CCA execution period(Min.128μs)

< CCA_LVL

B0 0x37

IDLE_WAIT[9:0]

Should be set, for

IDLE detection for

longer period.

ED0

ED value

(Internal signal)

CCA_RSLT[1:0]

[CCA_CTRL: B0 0x39(1-0)]

INT[18] (CCA completion)

[INT_SOURCE_GRP3: B0 0x0F(2)]

CCA_EN

[CCA_CTRL: B0 0x39(4)]

ED_VALUE[7:0]

[ED_RSLT: B0 0x3A]

AD conversion

(16μs)

ED value average period (16μsec×8=128μs)

0b10 (CCA on-going)

ED1

ED3

ED5

ED2

ED6

ED7

(0-7)

0b01 (BUSY)

averaging

> CCA_LVL

B0 0x37

IDLE_WAIT[9:0]

Should be set, for

IDLE detection for

longer period.

ED0

CCA execution period (Min.128μs)

ED4

ML7406 Datasheet(PDF) 65 Page - LAPIS Semiconductor Co., Ltd.

ML7406 Datasheet(HTML) 65 Page - LAPIS Semiconductor Co., Ltd.

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