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ML7406 Datasheet(PDF) 25 Page - LAPIS Semiconductor Co., Ltd.

Part # ML7406
Description  868MHz SRD RF transceiver IC
PDF  104 Pages
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Manufacturer  LAPIS [LAPIS Semiconductor Co., Ltd.]
Direct Link  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML7406 Datasheet(HTML) 25 Page - LAPIS Semiconductor Co., Ltd.

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ML7406
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●Packet Handling Function
○Packet format
ML7406 supports Wireless M-BUS frame FormatA/B, and Format C which is non Wireless M-BUS universal format. The
following packet handling are supported in FIFO mode or DIO mode
1) Preamble and SyncWord automatic insertion (TX)
--- DIO/FIFO mode
2) Preamble and SyncWord automatic detection (RX)
--- DIO/FIFOmode
3) Preamble and SyncWord automatic deletion (RX)
--- DIO/FIFO mode
4) CRC data insertion (TX)
--- FIFO mode
5) CRC check and error notification (RX)
--- DIO/FIFO mode
The following table shws control bits relative with the Packet format function.
Function
Control bit name
Packet formatsetting
PKT_FORMAT[1:0] ([PKT_CTRL1: B0 0x04(1-0)])
IEEE 802.15.4g setting
IEEE802_15_4G_EN ([PKT_CTRL1: B0 0x04(2)])
RX extended link layer mode disable
RX_EXTPKT_OFF ([PKT_CTRL1: B0 0x04(3)])
Data area bit order setting
DAT_LF_EN ([PKT_CTRL1: B0 0x04(4)])
Length area bit order setting
LEN_LF_EN ([PKT_CTRL1: B0 0x04(5)])
Extended link layer mode setting
EXT_PKT_MODE[1:0] ([PKT_CTRL1: B0 0x04(7-6)])
Length field setting
LENGTH_MODE ([PKT_CTRL2: B0 0x05(0)])
(1) Format A (Wireless M-BUS)
By setting PKT_FORMAT[1:0] ([PKT_CTRL1: B0 0x04(1-0)])=0b00, Wireless M-BUS Format A is selected.
Format A consists of 1st Block, 2nd Block and Optional Block(s). Each block has 2 bytes of CRC. “L-field” (1st byte of 1st
Block ) indicates packet length, which includes subsequenct user data bytes from “C-field”. However, CRC bytes and postamble
are excluded. Depending on “L-field” value, 2nd Block and Optional Block(s) are added.
The following [] indicates register address [bank #, address].
*1: Each mode has different minimum value of n.
*2: Indicates TX FIFO data storage area size.
*3: Indicates RX FIFO data storage area size.
*4: When RXDIO_CTRL[1:0] ([DIO_SET: B0 0x0C(7-6)])=0b10, indicates DCLK/DIO output area.
(*2)
Length
MSB
LSB
Preamble
Sync
Word
TX: automatic insertion
RX: automatic detection, deletion
L
field
Manchester/3-out-of-6 applicable [B0 0x07(3-2,1-0)]
1st Block
2nd Block
Optional Block
Postamble
CRC
field
C
field
M
field
A
field
CI
field
CRC
field
Data
field
CRC
field
Data
field
1
byte
1
byte
2
bytes
6
bytes
2
bytes
1
byte
2
bytes
2
bytes
Max.15
bytes
Max.16
bytes
0/2-8
bits
10/18/
32bits
> n*2 (*1)
bits
CRC applicable
CRC applicable
CRC applicable
(*2)
(*2)
(*3)
(*4)
[B0 0x07]
[B0 0x42]
[B0 0x43]
[B0 0x08]
[B1 0x25-2E]
[B0 0x05]
[B0 0x7A/7B, 7D/7E]
[B0 0x44]



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