ML7406 datasheet(28/104 Pages) LAPIS

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FEDL7406-02

ML7406

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(2) Format B (Wireless M-BUS)

By setting PKT_FORMAT([PKT_CTRL1: B0 0x04(1-0)])=0b01, Wireless M-BUS Format B is selected.

Format B consists of 1st Block, 2nd Block or Optional Block. Each block after 2nd Block has 2 bytes of CRC.

“L-field“ indicates packet length, which includes subsequent user data bytes from “C-field”. However, unlike Format A, CRC

bytes are included (Pastamble are exclueded). Depending on “L-field” value, 2nd Block and Optional Block(s) are added.

The following [] indicates register address [bank #, address].

*1: Each mode has different minimum value of n.

*2: Indicates TX FIFO data storage area size.

*3: Indicates RX FIFO data storage area size.

*4: When RXDIO_CTRL[1:0] ([DIO_SET: B0 0x0C(7-6)])=0b10, indicating DCLK/DIO output area.

Length

MSB

LSB

Preamble

Sync

Word

field

Manchester/3-out-of-6 applicable [B0 0x07(3-2,1-0)]

1st Block

2nd Block

Optional Block

Postamble

field

CRC

field

Data

field

CRC

field

Data

field

byte

bytes

byte

bytes

Max 115

bytes

Max 126

bytes

0/2-8

bits

10/18/

32bits

> n*2 (*1)

bits

CRC applicable

(*2)

(*3)

(*4)

[B0 0x07]

[B0 0x42]

[B0 0x43]

[B0 0x44]

[B0 0x08]

[B1 0x25-2E]

[B0 0x05]

[B0 0x7A/7B, 7D/7E]

TX: automatic insertion

RX: automatic detection, deletion

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