ML7406 datasheet(81/104 Pages) LAPIS

81 / 104 page

FEDL7406-02

ML7406

81/104

Interrupt notice

Reference point

Timing From reference point to interrupt generation

or interrupt generation timing

INT[15]

Sync error detection

During RX after SyncWord detection, out-of-sync detected.

(When RXDIO_CTRL[1:0] ([DIO_SET: B0 0x0C(7-6)]) =0b00 or

0b11.)

INT[16]

TX completion

TX_ON command

(*1)

RF wake-up+[TX data+3](bit)

=210μs+(39byte ×8 +3) bit × 10μs (bit cycle)=3360μs after

INT[17]

TX Data request accept

completion

After full length data are written to the TX_FIFO.

INT[18]

CCA completion

CCA execution start

(1)Normal mode

(ED value calculation averaging times +IDLE_WAIT setting

[IDLE_WAIT_H/L:B0 0x3B,3C]) ×AD conversion time

(2) IDLE detection mode

○IDLE judgment case

(ED value calculation averaging times +IDLE_WAIT setting

[IDLE_WAIT_H/L:B0 0x3B,3C]) ×AD conversion time

○BUSY judgment case

(ED value calculation averaging times) ×AD conversion time

AD conversion time period can be changed by AD clock

frequency ([ADC_CLK_SEL:B1 0x08]) . AD clock frequency =

1.88MHz: 17.7

μs, 2.0MHz: 16μs. For details, please refer to the

“CCA (Clear Channel Assessment) function”.

INT[19]

TX Length error

detection

After set length value to [TX_PKT_LEN_H/L: B0 0x7A/7B]

registers

INT[20]

TX FIFO access error

detection

(1) When the next packet data is writren to the TX_FIFO before

transmitting previous packet data.

(2) FIFO overflow when writing

(3) FIFO underflow (no data) when transmitting

INT[21]

Reserved

INT[22]

General purpose timer 1

completion

Timer start

General purpose timer 1 completion

General purpose timer clock cycle ×Division setting

[GT_CLK_SET: B0 0x33] × general purpose timer interval

setting [GT1_TIMER:B0 0x34]

For details, please refer to the “General purpose timer”.

INT[23]

General purpose timer 2

completion

Timer start

General purpose timer 2 completion

General purpose timer clock cycle ×Division setting

[GT_CLK_SET: B0 0x33] × general purpose timer interval

setting [GT2_TIMER:B0 0x35]

For details, please refer to the “General purpose timer”.

(*1) Before issuing TX_ON, writing full length TX data to the TX_FIFO.

ML7406 Datasheet(PDF) 81 Page - LAPIS Semiconductor Co., Ltd.

ML7406 Datasheet(HTML) 81 Page - LAPIS Semiconductor Co., Ltd.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL