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ML7406 Datasheet(PDF) 95 Page - LAPIS Semiconductor Co., Ltd. |
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ML7406 Datasheet(HTML) 95 Page - LAPIS Semiconductor Co., Ltd. |
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95 / 104 page  FEDL7406-02 ML7406 95/104 bit address [HEX] Register name description 7 6 5 43210 36 CCA_IGNORE_LVL ED threshold level setting for excluding CCA judgement 37 CCA_LVL CCA threshold level setting 38 CCA_ABORT Timing setting for forced termination of CCA operation 39 CCA_CTRL CCA control setting and result indication 3A ED_RSLT ED value indication 3B IDLE_WAIT_H IDLE detection period setting during CCA (high 2 bits) 3C IDLE_WAIT_L IDLE detection period setting during CCA (low byte) 3D CCA_PROG_H IDLE detection elapsed time display (during CCA high byte) 3E CCA_PROG_L IDLE detection elapsed time display during CCA(low byte) I 3F-40 Reserved 41 ED_CTRL ED detection control setting 42 TXPR_LEN_H TX preamble length setting (high byte) 43 TXPR_LEN_L TX preamblelength setting (low byte) 44 POSTAMBLE_SET Postamble length and pattern setting 45 SYNC_CONDITION1 RX preamble setting and ED control setting 46 SYNC_CONDITION2 ED threshold setting during synchronization 47 SYNC_CONDITION3 Tolerance of bit error setting in RX preamble and SyncWord detection 48 2DIV_CTRL Antenna diversity setting 49 2DIV_RSLT Antenna diversity result 4A ANT1_ED ANT1 ED value during antenna diversity 4B ANT2_ED ANT2 ED value during antenna diversity 4C ANT_CTRL Antenna control setting for TX, CCA or RX 4D MON_CTRL Monitor function setting 4E GPIO0_CTRL GPIO0 pin (pin#16) configuration setting 4F GPIO1_CTRL GPIO1 pin (pin#17) configuration setting 50 GPIO2_CTRL GPIO2 pin (pin#18) configuration setting 51 GPIO3_CTRL GPIO3 pin (pin#19) configuration setting 52 EXTCLK_CTRL EXT_CLK pin (pin #10) control setting 53 SPI/EXT_PA_CTRL SPI interface IO configurattion /external PA control setting 54 IF_FREQ_H IF frequency setting (high byte) 55 IF_FREQ_L IF frequency setting (low byte) 56 IF_FREQ_CCA_H IF frequency setting during CCA operation (high byte) 57 IF_FREQ_CCA_L IF frequency setting during CCA operation (low byte) 58 BPF_ADJ_H Bandpass filter capacitance adjustment (high 2 bits) 59 BPF_ADJ_L Bandpass filter capacitance adjustment (low byte) 5A-5B Reserved 5C BPF_CO BPF coefficient 5D BPF_CO_CCA BPFcoefficient (CCA) 5E IFF_ADJ_H Demodulator DC level adjustment (high 2 bits) 5F IFF_ADJ_L Demodulator DC level adjustment (low byte) 60 IFF_ADJ_CCA_H Demodulator DC level adjustment during CCA (high 7 bits) 61 IFF_ADJ_CCA_L Demodulator DC level adjustment during CCA (low byte) 62 OSC_ADJ1 Coarse adjustment of load capacito for oscillation circuits 63 OSC_ADJ2 Fine adjustment of load capaciatnce for oscillation circuits 64 OSC_ADJ3 Oscillation circuits bias adjustment 65 OSC_ADJ4 Oscillation circuits bias adjustment (high speed start-up) 66 RSSI_ADJ RSSI value adjustment 67 PA_MODE PA mode setting/PA regulator coarse adjustment 68 PA_REG_FINE_ADJ PA regulator fine adjustment 69 PA_ADJ PA gain adjustment 6A Reserved 6B Reserved 6C IQ_MAG_ADJ IF I/Q amplitude balance adjustment 6D IQ_PHASE_ADJ IF I/Q phase balance adjustment |
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