PM8313 datasheet(135/192 Pages) PMC

135 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

125

Registers 48H, 58H, 68H, 78H, 88H, 98H and A8H: MX12 Configuration and

Control

Bit

Type

Function

Default

Bit7

R/W

G747

Bit6

R/W

PINV

Bit5

R/W

MINV

Bit4

R/W

FINV

Bit3

R/W

XAIS

Bit2

R/W

XFERF

Bit1

R/W

XRES

Bit0

R/W

INTE

INTE:

When set high, the INTE bit enables the activation of the interrupt output,

INTB, whenever any of the LBRI[4:1] bits are set high in the Loopback

Request Interrupt register. Interrupts are masked when INTE is cleared low.

XRES:

The XRES bit only has effect in G.747 mode. When XRES is set high and

AIS is not being transmitted, the reserved bit (Set II, bit 3) is set to 0;

otherwise, the transmitted reserved bit is set to 1.

XFERF:

When set high, the XFERF bit enables the transmission of the far end receive

failure (FERF) signal in the DS2 output stream when in DS2 mode (i.e. G747

bit low). When XFERF is set high, the transmitted X bit is set to 0, provided

that AIS is not being transmitted; otherwise the transmitted X bit is set to 1.

When in G.747 mode (i.e. G747 bit high), the remote alarm indication (RAI) is

set to 1 when XFERF is set high; otherwise, the transmitted RAI bit is set to 0

unless AIS is being transmitted.

XAIS:

When set high, the XAIS bit enables the transmission of the alarm indication

signal (AIS) in the 6312 kbit/s output stream. When XAIS is set high, the

transmitted data is set to all ones; otherwise the transmitted data is not

affected.

PM8313 Datasheet(PDF) 135 Page - PMC-Sierra, Inc

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