PM8313 datasheet(147/192 Pages) PMC

147 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

137

DBCTRL bit is used to measure the drive capability of the data bus driver

pads.

IOTST:

The IOTST bit is used to allow normal microprocessor access to the test

registers and control the test mode in each TSB block in the D3MX for board

level testing. When IOTST is a logic 1, all blocks are held in test mode and

the microprocessor may write to a block's test mode 0 registers to manipulate

the outputs of the block and consequently the device outputs (refer to the

"Test Mode 0 Details" in the "Test Features" section).

HIZIO, HIZDATA:

The HIZIO and HIZDATA bits control the tri-state modes of the D3MX . While

the HIZIO bit is a logic 1, all output pins of the D3MX except the data bus are

held in a high-impedance state. The microprocessor interface is still active.

While the HIZDATA bit is a logic 1, the data bus is also held in a high-

impedance state which inhibits microprocessor read cycles.

11.2

Test Mode 0

In test mode 0, the D3MX allows the logic levels on the device inputs to be read

through the microprocessor interface, and allows the device outputs to be forced

to either logic level through the microprocessor interface.

To enable test mode 0, the IOTST bit in the Test Mode Select Register is set to

logic 1 and the following addresses must be written with 00H: 10DH, 111H,

121H, 125H, 129H, 131H, 133H, 135H, 141H, 149H, 151H, 159H, 161H, 169H,

171H, 179H, 181H, 189H, 191H, 199H, 1A1H and 1A9H.

Reading the following address locations returns the values for the indicated

inputs :

PM8313 Datasheet(PDF) 147 Page - PMC-Sierra, Inc