LAN9250 datasheet(313/421 Pages) MICROCHIP

313 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 313

LAN9250

14.4

1588 Clock Events

The 1588 Clock Events block is responsible for generating and controlling all 1588 Clock related events. Two clock

event channels, A and B, are available. The block diagram is shown in Figure 14-2.

For each clock event channel, a comparator compares the 1588 Clock with a Clock Target loaded in the 1588 Clock

Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) and 1588 Clock Target x NanoSeconds Register

(1588_CLOCK_TARGET_NS_x).

The Clock Target Register pair requires two 32-bit write cycles, one to each half, before the register pair is affected. The

writes may be in any order. There is a register pair for each clock event channel (A and B).

The Clock Target can be read by setting the Clock Target Read (1588_CLOCK_TARGET_READ) bit in the 1588 Com-

mand and Control Register (1588_CMD_CTL). This saves the current value of the both Clock Targets (A and B) into the

1588 Clock Target x Seconds Register (1588_CLOCK_TARGET_SEC_x) and 1588 Clock Target x NanoSeconds Reg-

ister (1588_CLOCK_TARGET_NS_x) where they can be read.

When the 1588 Clock reaches or passes the Clock Target for a clock event channel, a clock event occurs which triggers

the following:

• The maskable interrupt for that clock event channel (1588 Timer Interrupt A (1588_TIMER_INT_A) or 1588 Timer

Interrupt B (1588_TIMER_INT_B)) is set in the 1588 Interrupt Status Register (1588_INT_STS).

•The Reload/Add A (RELOAD_ADD_A) or Reload/Add B (RELOAD_ADD_B) bit in the 1588 General Configuration

–RELOAD_ADD = 1:

The new Clock Target is loaded from the Reload / Add Registers (1588 Clock Target x Reload

/ Add Seconds Register (1588_CLOCK_TARGET_RELOAD_SEC_x) and 1588 Clock Target x

Reload / Add NanoSeconds Register (1588_CLOCK_TARGET_RELOAD_NS_x)).

–RELOAD_ADD = 0:

The Clock Target is incremented by the Reload / Add Registers (1588 Clock Target x Reload /

Add Seconds Register (1588_CLOCK_TARGET_RELOAD_SEC_x) and 1588 Clock Target x

Reload / Add NanoSeconds Register (1588_CLOCK_TARGET_RELOAD_NS_x)). The Clock

Target NanoSeconds rolls over at 10^9 and the carry is added to the Clock Target Seconds.

The Clock Target Reload / Add Register pair requires two 32-bit write cycles, one to each half, before the register pair

is affected. The writes may be in any order. There is a register pair for each clock event channel (A and B).

Note:

Writing the 1588 Clock may cause the interrupt event to occur if the new 1588 Clock value is set equal to or

greater than the current Clock Target.

The Clock Target reload function (RELOAD_ADD = 1) allows the Host to pre-load the next trigger time in advance. The

add function (RELOAD_ADD = 0), allows for a automatic repeatable event.

FIGURE 14-2:

1588 CLOCK EVENT BLOCK DIAGRAM

IEEE 1588 Clock Events

compare >=

load / add

host

1588 Clock

Reload / Add A or B

Clock Target A or B

IRQ Flag A or B

GPIO Events

GPIO Clears

LAN9250 Datasheet(PDF) 313 Page - Microchip Technology

LAN9250 Datasheet(HTML) 313 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL