LAN9250 datasheet(309/421 Pages) MICROCHIP

309 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 309

LAN9250

Up to four transmit events are saved per port with the count shown in the 1588 TX Timestamp Count (1588_TX-

_TS_CNT[2:0]) field in the 1588 Port Capture Information Register (1588_CAP_INFO). Additional events are not

recorded. When the appropriate 1588 TX Timestamp Interrupt (1588_TX_TS_INT) bit is written as a one to clear, 1588

TX Timestamp Count (1588_TX_TS_CNT[2:0]) will decrement. If there are remaining events, the capture registers will

update to the next event and the interrupt will set again.

DELAY_REQ EGRESS TIME SAVING

Normally, in ordinary clock operation, the egress time of transmitted Delay_Req packets are saved and read by the Host

S/W. To avoid the need to read these timestamps via register access, the egress time of the last transmitted Delay_Req

packet on the port can be inserted into Delay_Resp packets received on the port.

The 1588 Port TX Delay_Req Egress Time Seconds Register (1588_TX_DREQ_SEC) and the 1588 Port TX

Delay_Req Egress Time NanoSeconds Register (1588_TX_DREQ_NS) hold the egress time of the Delay_Req mes-

sage.

These registers are updated by the H/W when the Delay_Req message is transmitted independent of the settings in the

TX PTP Message Type Enable (TX_PTP_MESSAGE_EN[15:0]) bits.

As above (including all applicable notes):

• The versionPTP and domainNumber fields and alternateMasterFlag in the flagField of the PTP header are

checked, if enabled.

Note:

Support for the IEEE 1588-2002 (v1) packet format is not provided.

• At the end of the frame, the frame’s FCS and the UDP checksum (for IPv4 and IPv6 formats) are verified, if

enabled.

If all tests pass, then the Delay_Req message information is updated and available for the receive function.

14.2.2.4

Egress Packet Modifications

EGRESS TIME INSERTION - SYNC MESSAGE FUNCTION

While functioning as an ordinary clock master, one-step transmission of Sync messages from the Host S/W requires the

actual egress time to be inserted into the ten byte, originTimestamp field. The 32-bit nanoseconds portion and the lower

32 bits of the seconds portion come from the latency adjusted, 1588 Clock value, saved above at the start of the frame.

The upper 16 bits of seconds are taken from the 1588 TX One-Step Sync Upper Seconds Register (1588_TX_ONE_-

STEP_SYNC_SEC). The Host software is responsible for maintaining this register if required.

Note:

Inserting the egress time into the packet is an additional, separately enabled, feature verses the Egress

Time Recording described above.

This function is enabled via the TX PTP Sync Message Egress Time Insertion (TX_PTP_SYNC_TS_INSERT) bit in the

1588 Port TX Modification Register (1588_TX_MOD) and is used only on frames which have bit 7 of the PTP header’s

reserved byte cleared.

Note:

The offset of the reserved byte is specified by the TX PTP 1 Reserved Byte Offset (TX_PTP_1_RSVD_OFF-

SET[5:0]) field in the 1588 Port TX Modification Register (1588_TX_MOD).

Proper operation of the transmitter requires that the reserved byte resides after the versionPTP field and

before the correctionField.

For version 2 of IEEE 1588, the reserved byte at offset 5 should be used.

Following the determination of packet format and qualification of the packet as a PTP message above, the PTP header

is checked.

• The versionPTP field of the PTP header is checked against the TX PTP Version (TX_PTP_VERSION[3:0]) field in

the 1588 Port TX Timestamp Configuration Register (1588_TX_TIMESTAMP_CONFIG). Only those messages

with a matching version will have their egress time inserted. A setting of 0 allows any PTP version.

Note:

The domainNumber field and alternateMasterFlag in the flagField of the PTP header are not tested.

Note:

Support for the IEEE 1588-2002 (v1) packet format is not provided.

EGRESS CORRECTION FIELD TURNAROUND TIME ADJUSTMENT - PDELAY_RESP MESSAGE FUNCTION

One-step Pdelay_Resp messages sent by the Host, require their correctionField to be calculated on-the-fly to include

the turnaround time between the ingress of the Pdelay_Req and the egress time of the Pdelay_Resp.

Pdelay_Resp.CF = Pdelay_Req.CF + Pdelay_Resp.egress time - Pdelay_Req.ingress time.

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