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LAN9250 Datasheet(PDF) 308 Page - Microchip Technology

Part # LAN9250
Description  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 Datasheet(HTML) 308 Page - Microchip Technology

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LAN9250
DS00001913A-page 308
 2015 Microchip Technology Inc.
addresses are allowed for Peer delay and non-Peer delay messages.
• For IPv4/UDP if the Protocol field in the fixed header was 51 (AH), the Next Header field is checked for 17 (UDP)
and the AH header is skipped.
• For IPv6/UDP if the Next Header field in the fixed header was one of the IPv6 extension header values, the Next
Header field in the extension header is checked for 17 (UDP) or one of the IPv6 extension header values. If it is
one of the IPv6 extension header values, the process repeats until either a value of 17 (UDP) or a value of 59 (No
Next Header) are found or the packet ends.
14.2.2.3
Transmit Message Egress Time Recording
Following the determination of packet format and qualification of the packet as a PTP message above, the PTP header
is checked for ALL of the following.
• The messageType field of the PTP header is checked and only those messages enabled via the TX PTP Message
Type Enable (TX_PTP_MESSAGE_EN[15:0]) bits in the 1588 Port TX Timestamp Configuration Register
(1588_TX_TIMESTAMP_CONFIG) will be have their egress times saved. Typically Sync, Delay_Req, PDe-
lay_Req and PDelay_Resp messages are enabled.
• The versionPTP field of the PTP header is checked against the TX PTP Version (TX_PTP_VERSION[3:0]) field in
the 1588 Port TX Timestamp Configuration Register (1588_TX_TIMESTAMP_CONFIG). Only those messages
with a matching version will be have their egress times saved. A setting of 0 allows any PTP version.
Note:
Support for the IEEE 1588-2002 (v1) packet format is not provided.
• If enabled via the TX PTP Domain Match Enable (TX_PTP_DOMAIN_EN) bit in the 1588 Port TX Timestamp
Configuration Register (1588_TX_TIMESTAMP_CONFIG), the domainNumber field of the PTP header is checked
against the TX PTP Domain (TX_PTP_DOMAIN[7:0]) value in the same register. Only those messages with a
matching domain will be have their egress times saved.
• If enabled via the TX PTP Alternate Master Enable (TX_PTP_ALT_MASTER_EN) bit in the 1588 Port TX Time-
stamp Configuration Register (1588_TX_TIMESTAMP_CONFIG), the alternateMasterFlag in the flagField of the
PTP header is checked and only those messages with an alternateMasterFlag set to 0 will be have their egress
times saved.
At the end of the frame, the frame’s FCS and the UDP checksum (for IPv4 and IPv6 formats) are verified. FCS checking
can be disabled using the TX PTP FCS Check Disable (TX_PTP_FCS_DIS) bit in the 1588 Port TX Timestamp Config-
uration Register (1588_TX_TIMESTAMP_CONFIG). UDP checksum checking can be disabled using the TX PTP UDP
Checksum Check Disable (TX_PTP_UDP_CHKSUM_DIS) bit in the same register.
Note:
A IPv4 UDP checksum value of 0x0000 indicates that the checksum is not included and is considered a
pass. A IPv6 UDP checksum value of 0x0000 is invalid and is considered a fail.
Note:
For IPv6, the UDP checksum calculation includes the IPv6 Pseudo header. Part of the IPv6 Pseudo header
is the final IPv6 destination address.
If the IPv6 packet does not contain a Routing header, then the final IPv6 destination address is the destina-
tion address contained in the IPv6 header.
If the IPv6 packet does contain a Routing header, then the final IPv6 destination address is the address in
the last element of the Routing header.
Note:
The UDP checksum is calculated over the entire UDP payload as indicated by the UDP length field and not
the assumed PTP packet length.
Note:
The UDP checksum calculation does not included layer 2 pad bytes, if any.
If the FCS and checksum tests pass:
• The latency adjusted, 1588 Clock value, saved above at the start of the frame, is recorded into the 1588 Port TX
Egress Time Seconds Register (1588_TX_EGRESS_SEC) and 1588 Port TX Egress Time NanoSeconds Regis-
ter (1588_TX_EGRESS_NS).
• The messageType and sequenceId fields and 12-bit CRC of the portIdentity field of the PTP header are recorded
into the Message Type (MSG_TYPE), Sequence ID (SEQ_ID) and Source Port Identity CRC (SRC_PRT_CRC)
fields of the 1588 Port TX Message Header Register (1588_TX_MSG_HEADER).
The 12-bit CRC of the portIdentity field is created by using the polynomial of X12 + X11 + X3 + X2 + X + 1.
• The corresponding maskable 1588 TX Timestamp Interrupt (1588_TX_TS_INT) is set in the 1588 Interrupt Status
Register (1588_INT_STS).



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