LAN9250 datasheet(334/421 Pages) MICROCHIP

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LAN9250

DS00001913A-page 334

 2015 Microchip Technology Inc.

14.8.12

1588 CLOCK TARGET X SECONDS REGISTER (1588_CLOCK_TARGET_SEC_X)

This read/write register combined with 1588 Clock Target x NanoSeconds Register (1588_CLOCK_TARGET_NS_x)

form the 1588 Clock Target value. The 1588 Clock Target value is compared to the current 1588 Clock value and can

be used to trigger an interrupt upon at match. Refer to Section 14.4, "1588 Clock Events" for additional information.

Note:

Both this register and the 1588 Clock Target x NanoSeconds Register (1588_CLOCK_TARGET_NS_x)

must be written for either to be affected.

Note:

The value read is the saved value of the 1588 Clock Target when the Clock Target Read

(1588_CLOCK_TARGET_READ) bit in the 1588 Command and Control Register (1588_CMD_CTL) is set.

Note:

When the Clock Target Read (1588_CLOCK_TARGET_READ) bit is set, the previous value written to this

and the 1588 Clock Target x NanoSeconds Register (1588_CLOCK_TARGET_NS_x).

Offset:

Channel A: 12Ch

Size:

32 bits

Channel B: 13Ch

Bank:

Channel A: na

Channel B: na

Bits

Description

Type

Default

31:0

Clock Target Seconds (CLOCK_TARGET_SEC)

This field contains the seconds portion of the 1588 Clock Compare value.

R/W

00000000h

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