LAN9250 datasheet(377/421 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001913A-page 377

LAN9250

14.8.47

1588 GPIO X RISING EDGE CLOCK NANOSECONDS CAPTURE REGISTER

(1588_GPIO_RE_CLOCK_NS_CAP_X)

This read only register combined with the 1588 GPIO x Rising Edge Clock Seconds Capture Register (1588_GPI-

O_RE_CLOCK_SEC_CAP_x) forms the GPIO rising edge timestamp capture.

Note:

Values are only valid if the appropriate 1588 GPIO Rising Edge Interrupt (1588_GPIO_RE_INT[7:0]) in the

1588 Interrupt Status Register (1588_INT_STS) indicates that a timestamp is available.

Note:

Unless the corresponding Lock Enable GPIO Rising Edge (LOCK_GPIO_RE) bit is set, a new capture may

occur between reads of this register and the 1588 GPIO x Rising Edge Clock Seconds Capture Register

(1588_GPIO_RE_CLOCK_SEC_CAP_x). Software techniques are required to avoid reading intermediate

values.

Note:

Port and GPIO registers share a common address space. GPIO registers are selected by the Bank Select

(BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL). The GPIO

accessed (“x”) is set by the GPIO Select (GPIO_SEL[2:0]) field.

Note:

All 8 GPIO register sets are available.

Offset:

170h

Size:

32 bits

Bank:

Bits

Description

Type

Default

31:30

RESERVED

29:0

Timestamp NanoSeconds (TS_NS)

This field contains the nanoseconds portion of the timestamp upon the rising

edge of a GPIO or upon a software commanded manual capture.

00000000h

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