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LAN9250 Datasheet(PDF) 390 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 390 Page - Microchip Technology |
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390 / 421 page  LAN9250 DS00001913A-page 390 2015 Microchip Technology Inc. 16.4.3 GENERAL PURPOSE I/O DATA & DIRECTION REGISTER (GPIO_DATA_DIR) This read/write register configures the direction of the GPIO pins and contains the GPIO input and output data bits. Offset: 1E4h Size: 32 bits Bits Description Type Default 31:19 RESERVED RO - 18:16 GPIO Direction 2-0 (GPIODIR[2:0]) These bits set the input/output direction of the 3 GPIO pins. 0: GPIO pin is configured as an input 1: GPIO pin is configured as an output R/W 000b 15:3 RESERVED RO - 2:0 GPIO Data 2-0 (GPIOD[2:0]) When a GPIO pin is enabled as an output, the value written to this field is out- put on the corresponding GPIO pin. Upon a read, the value returned depends on the current direction of the pin. If the pin is an input, the data reflects the current state of the corresponding GPIO pin. If the pin is an output, the data is the value that was last written into this register. The pin direction is deter- mined by the GPIODIR bits of this register and the 1588_GPIO_OE bits in the General Purpose I/O Configuration Register (GPIO_CFG). R/W 000b |
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