LAN9250 datasheet(387/421 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001913A-page 387

LAN9250

16.4.1

LED CONFIGURATION REGISTER (LED_CFG)

This read/write register configures the GPIO[2:0] pins as LED pins and sets their functionality.

Note 1:

The default value of this field is determined by the configuration strap LED_fun_strap[2:0].

Note 2:

The default value of this field is determined by the configuration strap LED_en_strap[2:0].

Offset:

1BCh

Size:

32 bits

Bits

Description

Type

Default

31:11

RESERVED

10:8

LED Function 2-0 (LED_FUN[2:0])

These bits control the function associated with each LED pin as shown in

Section 16.3, "LED Operation," on page 385.

Note:

In order for these assignments to be valid, the particular pin must

be enabled as an LED output pin via the LED_EN bits of this

R/W

Note 1

7:3

RESERVED

2:0

LED Enable 2-0 (LED_EN[2:0])

This field toggles the functionality of the GPIO[2:0] pins between GPIO and

LED.

0: Enables the associated pin as a GPIO signal

1: Enables the associated pin as a LED output

When configured as LED outputs, the pins are open-drain/open-source out-

puts and the pull-ups and input buffers are disabled. When open-drain/open-

source, the polarity of the pins depends upon the strap value sampled at

reset. If a high is sampled at reset, then this signal is active low.

Note:

The polarity is determined by the strap value sampled on reset (a

hard-strap) and not the soft-strap value (of the shared strap) set via

EEPROM.

When configured as a GPIO output, the pins are configured per the General

Purpose I/O Configuration Register (GPIO_CFG) and the General Purpose I/

O Data & Direction Register (GPIO_DATA_DIR). The polarity of the pins

does not depend upon the strap value sampled at reset.

R/W

Note 2

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