DS26401 datasheet(216/309 Pages) DALLAS

216 / 309 page

DS26401 Octal T1/E1/J1 Framer

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11.2 E1 Transmit Formatter Description and Operation

Eight fully independent DS1/E1 transmit formatters are included within the DS26401. The formatters are designed

to interface seamlessly to the line side via an external LIU. Each port can be individually programmed to transmit

AMI, HDB3 (E1), or NRZ data. In E1 mode, each formatter supports FAS, CRC-4, and CAS frame formats,

transmits common alarms such as AIS and RAI.

Each transmitter has an HDLC controllers which can be mapped into a single time slot, or Sa4 to Sa8 bits (E1

mode) or the FDL (T1 mode) and has 64-byte FIFO buffers in both the transmit and receive paths.

Host interface is simplified with status registers optimized for either interrupt driven or polled environments. In many

cases, status bits are reported both real-time and latched on change-of-state with separate bits for each state

change. Most latched bits can be mapped to generate an external interrupt on the INT pin.

Additional details concerning the operation of the E1 formatter are included within the register descriptions within

this section.

DS26401 Datasheet(PDF) 216 Page - Dallas Semiconductor