DS26401 datasheet(260/309 Pages) DALLAS

260 / 309 page

DS26401 Octal T1/E1/J1 Framer

260

11.21 E1 Transmit Synchronizer

The DS26401 transmitter has the ability to identify the E1 frame boundary, as well as the CRC multiframe

boundaries within the incoming NRZ data stream at TSER. Control signals for the transmit synchronizer are located

in the TSYNCC register. The Transmit Synchronizer Status (TSYNCS) register provides a latched status bit (LOFD)

to indicate that a loss-of-frame synchronization has occurred, and a real-time bit (LOF) which is set high when the

synchronizer is searching for frame/multiframe alignment. The LOFD bit can be enabled to cause an interrupt

condition on INT.

Note that when the transmit synchronizer is used, the TSYNC signal should be set as an output (TSIO = 1) and the

recovered frame sync pulse will be output on this signal. The recovered CRC4 multiframe sync pulse will be output

if enabled with TIOCR.0 (TSM = 1). The transmit synchronizer cannot be used while the transmit elastic store is

enabled.

TSYNCC

Transmit Synchronizer Control Register

18Eh + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

—

CRC4

TSEN

SYNCE

RESYNC

Default

Bit 0 / Resynchronize (RESYNC).

When toggled from low to high, a resynchronization of the transmit-side framer

is initiated. Must be cleared and set again for a subsequent resync.

Bit 1 / Sync Enable (SYNCE)

0 = auto resync enabled

1 = auto resync disabled

Bit 2 / Transmit Synchronizer Enable (TSEN)

0 = transmit synchronizer disabled

1 = transmit synchronizer enabled

Bit 3 / CRC4 Enable (RCRC4)

0 = CRC4 disabled

1 = CRC4 enabled

Bits 4 to 7 / Unused. Must be set = 0 for proper operation.

DS26401 Datasheet(PDF) 260 Page - Dallas Semiconductor