DS26401 datasheet(264/309 Pages) DALLAS

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DS26401 Octal T1/E1/J1 Framer

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12.3 Pattern Generation

12.3.1 Polynomial Generation

The internal BERT has a 32-bit TAP register (BTR) used to tap up to 32 bits in the feedback path of the polynomial

generator. The BERT also contains a 32-bit Seed register used to preset the polynomial generator with an initial

value. The Seed values are latched on the rising edge of the TL control bit in BCR1.

The internal BERT can generate polynomial patterns of any length up to and including 2

32 - 1. All the industry

standard polynomials can be programmed using the control registers (some examples are given in Table 16-1).

The polynomial is generated using a shift register of programmable length and programmable feed back tap

positions. The user has access to all combination of pattern length and pattern tap locations to generate industry

standard polynomials or other combinations as well. In addition, the QRSS pattern described in T1.403 is supported

by setting the QRSS bit in BCR1. The T1.403 QRSS pattern is the polynomial 2

20 - 1 with the additional requirement

that "an output bit is forced to ONE whenever the next 14 bits are ZERO."

12.3.2 Repetitive Pattern Generation

In addition to polynomial patterns, the BERT can generate repetitive patterns of considerable length. The host has

access to 512 bytes of memory for storing pattern. The End Repetitive Address registers (04h, and 05h) are used to

program the length of the pattern itself. Memory is addressed indirectly and is used to store the pattern. Data can

be sent MSB or LSB first as it appears in the memory.

Repetitive patterns can include simple patterns such as 3 in 24, but the additional memory can be used to store

patterns such as DDS-n patterns or T1-n patterns. Repetitive patterns are stored in increments of 8 bits. In order to

generate a repetitive pattern that is 12 bits long (3 nibbles), the pattern is written twice such that the pattern is 24

bits long (3 bytes), and repeats twice in memory. The same is true when the device is used in serial mode, a 5-bit

pattern is written to memory 5 times. For example:

To generate a 00001 pattern at the serial output:

Write these bytes to memory:

RAM ADDRESS

BINARY CODE

HEX CODE

00h

00010000

10h

01h

01000010

42h

02h

00001000

08h

03h

00100001

21h

04h

10000100

84h

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