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DS26401 Datasheet(PDF) 268 Page - Dallas Semiconductor |
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DS26401 Datasheet(HTML) 268 Page - Dallas Semiconductor |
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268 / 309 page ![]() DS26401 Octal T1/E1/J1 Framer 268 Register Name: BCR2 Register Description: BERT Control Register 2 Register Address: 2F1h Bit # 7 6 5 4 3 2 1 0 Name — — TINV RINV SBE EIR2 EIR1 EIR0 Default 0 0 0 0 0 0 0 0 Bits 0 to 2 / Error Insert Bits 0 to 2 (EIB0 to EIB2). Will automatically insert bit errors at the prescribed rate into the generated data pattern. Can be used for verifying error detection features. EIB2 EIB1 EIB0 Error Rate Inserted 0 0 0 No errors automatically inserted 0 0 1 10E-1 0 1 0 10E-2 0 1 1 10E-3 1 0 0 10E-4 1 0 1 10E-5 1 1 0 10E-6 1 1 1 10E-7 Bit 3 / Single Bit Error Insert (SBE). A low-to-high transition creates a single bit error. Must be cleared and set again for a subsequent bit error to be inserted. Bit 4 / Receive Invert Data Enable (RINV) 0 = do not invert the incoming data stream 1 = invert the incoming data stream Bit 5 / Transmit Invert Data Enable (TINV) 0 = do not invert the outgoing data stream 1 = invert the outgoing data stream Bits 6, 7 / Unused. Must be set = 0 for proper operation. |
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