IP178G datasheet(36/76 Pages) ETC2

36 / 76 page

IP178G

Data Sheet

36 / 76

December 19, 2012

IP178G-DS-R01.3

R/W = Read/Write,

SC = Self-Clearing,

RO = Read Only,

LL = Latching Low,

LH = Latching High

6.1

MII Register

PHY

MII

R/W

Description

Default

Control Register

0~7

0.15

RW/

Reset

The PHY is reset if user writes “1” to this bit. The reset period is

around 2ms. User has to wait for at least 2ms to access IP178G.

（according design should delete）

0~7

0.14

R/W

Loop back

1 = Loop back mode

0 = normal operation

When this bit set, IP178G will be isolated from the network media,

that is, the assertion of TXEN at the MII will not transmit data on the

network. All MII transmission data will be returned to MII receive

data path in response to the assertion of TXEN.

Bit 0.12 is cleared automatically, if this bit is set. User has to

program bit 0.12 again after loop back test.

（according design

should delete

）

0~7

0.13

Speed Selection

1 = 100Mbps

0 = 10Mbps

It is valid only if bit 0.12 is set to be 0.

0~7

0.12

Auto-Negotiation(AN) Enable

1 = Auto-Negotiation Enable

0 = Auto-Negotiation Disable

0~7

0.11

R/W

Power Down

1: power down mode

0: normal operation

0~7

0.10

Isolate

IP178G doesn’t support this function.

0~7

0.9

Restart Auto-Negotiation

1 = re-starting Auto-Negotiation

0: normal operation

0~7

0.8

R/W

Duplex mode

1 = full duplex

0 = half duplex

It is valid only if bit 0.12 is set to be 0.

0~7

0.7

R/W Collision test

0~7

0[6:0]

RO Reserved

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