LTM4677 datasheet(104/110 Pages) AD

104 / 110 page

LTC3888-1

104

Rev. 0

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SMBALERT_MASK Default Setting: (Refer Also to Figure 2)

STATUS RESISTER

ALERT Mask Value MASKED BITS

STATUS_VOUT

0x00

None

STATUS_IOUT

0x00

None

STATUS_TEMPERATURE

0x00

None

STATUS_CML

0x00

None

STATUS_INPUT

0x00

None

STATUS_MFR_SPECIFIC

0x11

Bit 4 (internal PLL unlocked), bit 0 (FAULT low)

PMBus COMMAND DETAILS (Fault Response and Communication)

Figure 50. Example of Setting SMBALERT_MASK

Figure 51. Example of Reading SMBALERT_MASK

MFR_FAULT_PROPAGATE

The MFR_FAULT_PROPAGATE command determines internal events that cause FAULT to be asserted. Setting a bit in

this register allows the specified condition to also assert the FAULT output for that channel. FAULT is not asserted by

a fault, even if set to propagate, if that FAULT_RESPONSE is set to Ignore. The state of SMBLALERT_MASK does not

affect fault propagation.

Supported Values:

BIT

PROPAGATED CONDITION

(Reserved).

VOUT short cycled (automatically deasserted 120ms after VOUT is fully OFF).

TON_MAX_FAULT_LIMIT exceeded.

VOUT_UV_FAULT_LIMIT exceeded (unfiltered, aka VOUT_UV_UF).

MFR_OT_FAULT_LIMIT exceeded.

10*

Channel 1 POWER_GOOD false.

Channel 0 POWER_GOOD false.

(Reserved).

SLAVE

ADDRESS

SMBALERT_MASK

COMMAND CODE

STATUS_x

COMMAND CODE

W A

1 1

MASK BYTE

388812 F50

SLAVE

ADDRESS

SMBALERT_MASK

COMMAND CODE

BLOCK COUNT

(= 1)

W A

STATUS_x

COMMAND CODE

1 1

…

BLOCK COUNT

(= 1)

NA P

388812 F51

1 1

MASK BYTE

SLAVE

ADDRESS

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