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FXLS93421 Datasheet(PDF) 205 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 205 Page - NXP Semiconductors |
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205 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor 14.3.4.1 Reserved command message format MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Command x x x x x x x x x x x x x x x x x x x x 8-bit CRC 0 0 0 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] 0 0 1 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] 0 1 0 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] 0 1 1 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] 1 0 1 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] 1 1 1 0 x x x x x x x x x x x x x x x x x x x x CRC[7:0] Bit field Definition C[3:0] Reserved Command CRC[7:0] CRC. See Section 14.4 14.3.4.2 Reserved command response message format MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Command Echo Data 8-bit CRC x x x x x x x x x x x x x x x x x x x x x x x x CRC[7:0] Table 317. Reserved command response message format Bit field Definition Command Echo Reserved Command Echo - Undefined Data Response Data - Undefined CRC[7:0] CRC. See Section 14.4 Table 318. Reserved command response message format description 14.4 Error checking 14.4.1 Default 8-bit CRC 14.4.1.1 Command error checking The device calculates an 8-bit CRC on the entire 32-bits of each command. Message data is entered into the CRC calculator MSB first, consistent with the transmission order of the message. If the calculated CRC does not match the transmitted CRC, the command is ignored and the device responds with the SPI Error response. The CRC decoding procedure is: 1. A seed value is preset into the least significant bits of the shift register. 2. Using a serial CRC calculation method, the receiver rotates the received message and CRC into the least significant bits of the shift register in the order received (MSB first). 3. When the calculation on the last bit of the CRC is rotated into the shift register, the shift register contains the CRC check result. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 205 / 254 |
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