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FXLS93421 Datasheet(PDF) 207 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 207 Page - NXP Semiconductors |
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207 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor 14.4.2 Selectable 4-bit CRC The user can select a 4-bit CRC instead of the default 8-bit CRC for the SPI by programming the SPI_CFG register as described in Section 11.2.20. 14.4.2.1 SPI command format with 4-bit CRC MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Register Access Command Command Fixed Bits: Must = 0x0 Register Address Register Data Fixed Bits: Must = 0x0 4-bit CRC C[3:0] 0 0 0 0 RA[7:1] RA[0] RD[7:0] 0 0 0 0 CRC[3:0] Sensor Data Command Command Fixed Bits: Must = 0x00000 Fixed Bits: Must = 0x0 4-bit CRC C[3:0] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRC[3:0] Table 322. SPI command format with 4-bit CRC 14.4.2.2 SPI response format with 4-bit CRC MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Response to Register Request Command Basic Status Unused Data = 0x0 Register Data: Contents of RA[7:1] High Byte Register Data: Contents of RA[7:1] Low Byte Unused Data = 0x0 4-bit CRC C[0] C[3] C[2] C[1] ST[1:0] 0 0 RD[15:8] RD[7:0] 0 0 0 0 CRC[3:0] Response to Sensor Data Request Command Basic Status Sensor Data Detail Status KAC 4-bit CRC C[0] C[3] C[2] C[1] ST[1:0] SD[11:0] Optional SD resolution SF[1:0] KAC[3:0] CRC[3:0] Error Response to Register Request Command Basic Status Unused Data = 0x0 Register Data: Contents of RA[7:1] High Byte Register Data: Contents of RA[7:1] Low Byte Unused Data = 0x0 4-bit CRC 0 0 0 0 1 1 0 0 RD[15:8] RD[7:0] 0 0 0 0 CRC[3:0] Error Response to Sensor Data Request With Sensor Data Command Basic Status Sensor Data Detail Status KAC 4-bit CRC C[0] C[3] C[2] C[1] 1 1 SD[11:0] Optional SD resolution SF[1:0] KAC[3:0] CRC[3:0] Error Response to Sensor Data Request Without Sensor Data Command Basic Status x Unused Data = 0x0000 Detail Status Unused Data = 0x0 4-bit CRC 0 0 0 0 1 1 x 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF[1:0] 0 0 0 0 CRC[3:0] Table 323. SPI response format with 4-bit CRC 14.4.2.3 Command error checking with 4-bit CRC The device calculates a 4-bit CRC on the entire 32-bits of each command. Message data is entered into the CRC calculator MSB first, consistent with the transmission order of the message. If the calculated CRC does not match the transmitted CRC, the command is ignored and the device responds with the SPI Error response. The CRC decoding procedure is: FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 207 / 254 |
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