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FXLS93421 Datasheet(PDF) 203 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 203 Page - NXP Semiconductors |
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203 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor • The ENDINIT bit is cleared – This applies to all registers with the exception of the RESET[1:0] bits in the DEVLOCK_WR register If the conditions are met, the register write is executed and the device responds to the register write request as shown in Section 14.3.2.2. Otherwise, no register is written and the device responds with the Error Response as defined in Section 14.2. The register is not written until the transfer during which the register write was requested has been completed. A register write command to a read-only register will not execute, but will result in a valid response. 14.3.2.1 Register write command message format MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Command C[3:0] Fixed Bits: Must = 0x0 Register Address Register Data 8-bit CRC 1 0 0 0 0 0 0 0 RA[7:1] RA[0] RD[7:0] CRC[7:0] Table 309. Register write command message format Bit field Definition C[3:0] Register Write Command = '1000' RA[7:0] RA[7:1] contains the byte address of the register to be written. RD[7:0] RD[7:0] contains the data byte to be written to address RA[7:0] CRC[7:0] CRC. See Section 14.4 Table 310. Register write command message format description 14.3.2.2 Register write response message format MSB LSB 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Command C[0], [3:1] Basic Status Unused Data = 0x0 Register Data: Contents of RA[7:1] High Byte Register Data: Contents of RA[7:1] Low Byte 8-bit CRC 0 1 0 0 ST[1:0] 0 0 RD[15:8] RD[7:0] CRC[7:0] Table 311. Register write response message format Bit field Definition C[0], [3:1] Register Write Command = '0100' ST[1:0] Status. See Section 14.5.1 RD[15:8] The contents of the register addressed by RA[7:1] High Byte (RA[0] = 1) RD[7:0] The contents of the register addressed by RA[7:1] Low Byte (RA[0] = 0) CRC[7:0] CRC. See Section 14.4 Table 312. Register write response message format description FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 203 / 254 |
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