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FXLS93421 Datasheet(PDF) 206 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 206 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
4. If the shift register contains all zeros, the CRC is correct.
5. If the shift register contains a value other than zero, the CRC is incorrect.
The CRC polynomial and seed are shown in Table 319.
SPICRCSEED[3:0]
Default polynomial
Default non-direct seed
0000
x8 + x5 + x3 + x2 + x + 1
1111 1111
Non-Zero
x8 + x5 + x3 + x2 + x + 1
1111 SPICRCSEED[3:0]
Table 319. SPI command message CRC
Some example CRC calculations are shown in Table 321.
14.4.1.2 Response error checking
The device calculates a CRC on the entire 32-bits of each response. Message data is
entered into the CRC calculator MSB first, consistent with the transmission order of the
message.
The CRC Encoding procedure is:
1. A seed value is preset into the least significant bits of the shift register.
2. Using a serial CRC calculation method, the transmitter rotates the transmitted
message into the least significant bits of the shift register, MSB first.
3. Following the transmitted message, the transmitter feeds eight zeros into the shift
register, to match the length of the CRC.
4. When the last zero is fed into the input adder, the shift register contains the CRC.
5. The CRC is transmitted.
The CRC polynomial and seed are shown in Table 320.
SPICRCSEED[3:0]
Default polynomial
Default non-direct seed
0000
x8 + x5 + x3 + x2 + x + 1
1111 1111
Non-Zero
x8 + x5 + x3 + x2 + x + 1
1111 SPICRCSEED[3:0]
Table 320. SPI CRC polynomial and seed
Some example CRC calculations are shown in Table 321.
Bits[31:28]
Bits[27:24]
Bits[23:16]
Bits[15:8]
Bits[7:0]
Polynomial
Seed
Command
0x0
Register address Register data
8-bit CRC
x8 + x5 + x3 + x2 + x + 1
1111 1111
0x8
0x0
22
C1
0xBD
x8 + x5 + x3 + x2 + x + 1
1111 1111
0x4
0x0
1F
C1
0x57
x8 + x5 + x3 + x2 + x + 1
1111 1111
0xC
0x0
22
00
0x66
x8 + x5 + x3 + x2 + x + 1
1111 1111
0x6
0x0
1F
C1
0xB8
x8 + x5 + x3 + x2 + x + 1
1111 1111
0x4
0x0
FF
5A
0xE5
x8 + x5 + x3 + x2 + x + 1
1111 1111
0xC
0x0
3E
00
0x13
x8 + x5 + x3 + x2 + x + 1
1111 1111
0x6
0x0
FF
5A
0x0A
Table 321. SPI 8-bit CRC calculation examples
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
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