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CEC1712 Datasheet(PDF) 134 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 134 Page - Microchip Technology |
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134 / 338 page ![]() CEC1712 DS00003416C-page 134 2020-2021 Microchip Technology Inc. 10.10.12 SCRATCHPAD REGISTER 10.11 Configuration Registers Configuration Registers for an instance of the UART are listed in the following table. Host access to Configuration Reg- isters is through the Configuration Port using the Logical Device Number of each instance of the UART and the Index shown in the “Host Index” column of the table. The EC can access Configuration Registers directly. The EC address for each register is formed by adding the Base Address for each instance of the UART shown in the Block Overview and Base Address Table in Section 3.0, "Device Inventory" to the offset shown in the “EC Offset” column. 10.11.1 ACTIVATE REGISTER Offset 07h Bits Description Type Default Reset Event 7:0 SCRATCH This 8 bit read/write register has no effect on the operation of the Serial Port. It is intended as a scratchpad register to be used by the programmer to hold data temporarily. R/W 0h RESET TABLE 10-15: CONFIGURATION REGISTER SUMMARY EC Offset Host Index Register Name 330h 30h Activate Register 3F0h F0h Configuration Select Register Offset 30h Bits Description Type Default Reset Event 7:1 Reserved RES - - 0 ACTIVATE When this bit is 1, the UART logical device is powered and func- tional. When this bit is 0, the UART logical device is powered down and inactive. R/W 0b RESET |
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