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CEC1712 Datasheet(PDF) 136 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 136 Page - Microchip Technology |
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136 / 338 page ![]() CEC1712 DS00003416C-page 136 2020-2021 Microchip Technology Inc. 11.0 GPIO INTERFACE 11.1 General Description The CEC1712 GPIO Interface provides general purpose input monitoring and output control, as well as managing many aspects of pin functionality; including, multi-function Pin Multiplexing Control, GPIO Direction control, PU/PD (PU_PD) resistors, asynchronous wakeup and synchronous Interrupt Detection (int_det), GPIO Direction, and Polarity control, as well as control of pin drive strength and slew rate. Features of the GPIO Interface include: • Inputs: - Asynchronous rising and falling edge wakeup detection - Interrupt High or Low Level • On Output: - Push Pull or Open Drain output • Pull up or pull down resistor control • Interrupt and wake capability available for all GPIOs • Programmable pin drive strength and slew rate limiting • Group- or individual control of GPIO data. • Multiplexing of all multi-function pins are controlled by the GPIO interface 11.2 Block Diagram The GPIO Interface Block Diagram shown in Figure 11-1 illustrates the functionality of a single CEC1712 GPIO Interface pin. The source for the Pin Multiplexing Control, Interrupt Detection (int_det), GPIO Direction, and Polarity controls in Figure 11-1 is a Pin Control Register that is associated with each pin (see Section 11.6.1.1, "Pin Control Register," on page 141). FIGURE 11-1: GPIO INTERFACE BLOCK DIAGRAM GPIOxxx PIN GPIO Input Register Read MUX (MUX = 00) Read Polarity MUX Input 3 (MUX = 11) MUX MUX GPIO Direction Input 2 (MUX = 10) Input 1 (MUX = 01) Interrupt Detector Output 1 (MUX = 01) Output 2 (MUX = 10) Output 3 (MUX = 11) GPIO Output Register Write Mux Control 2 Interrupt Detection 4 Interrupt |
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