ADSP-SC583 datasheet(3/173 Pages) AD

3 / 173 page

Rev. B

Page 3 of 173

December 2018

ADSP-SC582/SC583/SC584/SC587/SC589/ADSP-21583/21584/21587

GENERAL DESCRIPTION

The ADSP-SC58x/ADSP-2158x processors are members of the

SHARC

® family of products. The ADSP-SC58x processor is

based on the SHARC+ dual core and the Arm

® Cortex®-A5

core. The ADSP-SC58x/ADSP-2158x SHARC processors are

members of the SIMD SHARC family of digital signal proces-

sors (DSPs) that feature Analog Devices, Inc., Super Harvard

Architecture

®. These 32-bit/40-bit/64-bit floating-point proces-

sors are optimized for high performance audio/floating-point

applications with large, on-chip, static random-access memory

(SRAM), multiple internal buses that eliminate input/output

(I/O) bottlenecks, and innovative digital audio interfaces (DAI).

New additions to the SHARC+ core include cache enhance-

ments and branch prediction, while maintaining instruction set

compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and

memory (see Table 1, Table 2, and Table 3), the Arm Cortex-A5

and SHARC processor is the platform of choice for applications

that require programmability similar to reduced instruction set

computing (RISC), multimedia support, and leading edge signal

processing in one integrated package. These applications span a

wide array of markets, including automotive, professional

audio, and industrial-based applications that require high float-

ing-point performance.

Table 2 provides comparison information for features that vary

across the standard processors. (N/A in the table means not

applicable.)

Table 3 provides comparison information for features that vary

across the automotive processors. (N/A in the table means not

applicable.)

Table 1. Common Product Features

Product Features

ADSP-SC58x/ADSP-2158x

DAI (includes SRU)

Full SPORTs

4 per DAI

S/PDIF receive/transmit

1per DAI

ASRCs

4 pair per DAI

PCGs

2 per DAI

I2C (TWI)

Quad-data bit SPI

Dual-data bit SPI

CAN2.0

UARTs

Link ports

Enhanced PPI

GP timer1

GP counter

Enhanced PWMs2

Watchdog timers

ADC control module

Yes

Static memory controller

Yes

Hardware accelerators

High performance FFT/IFFT

Yes

FIR/IIR

Yes

Harmonic analysis engine

Yes

SINC filter

Yes

Security cryptographic engine Yes

Multichannel 12-bit ADC

8-channel

1 Eight timers are available in the 529-BGA package only. The 349-BGA package

does not include Timer 6 and Timer 7.

2 On the 349-BGA package, the PWM2_AH/AL and PWM2_BH/BL signals are

not available. The PWM2_CH/CL and PWM2_DH/DL signals, however, are

available and can be used in conjunction with PWM2_TRIP0 and PWM2_SYNC

signals.

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