ADSP-SC583 datasheet(1/173 Pages) AD

Part #	ADSP-SC583

Description	SHARC Dual-Core DSP with Arm Cortex-A5

PDF	173 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

1 / 173 page

SHARC, SHARC+, and the SHARC logo are registered trademarks of Analog Devices, Inc.

SHARC+ Dual-Core

DSP with Arm Cortex-A5

ADSP-SC582/SC583/SC584/SC587/SC589/ADSP-21583/21584/21587

Rev. B

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

SYSTEM FEATURES

Dual enhanced SHARC+ high performance floating-point

cores

Up to 500 MHz per SHARC+ core

Up to 5 Mb (640 kB) Level 1 (L1) SRAM memory per core

with parity (optional ability to configure as cache)

32-bit, 40-bit, and 64-bit floating-point support

32-bit fixed point

Byte, short-word, word, long-word addressed

Arm Cortex-A5 core

500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle

32 kB L1 instruction cache/32 kB L1 data cache

256 kB Level 2 (L2) cache with parity

Powerful DMA system

On-chip memory protection

Integrated safety features

19 mm × 19 mm 349/529 BGA (0.8 pitch), RoHS compliant

Low system power across automotive temperature range

MEMORY

Large on-chip L2 SRAM with ECC protection, up to 256 kB

On-chip L2 ROM (512 kB)

Two Level 3 (L3) interfaces optimized for low system power,

providing a 16-bit interface to DDR3 (supporting 1.5 V

capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices

ADDITIONAL FEATURES

Security and Protection

Cryptographic hardware accelerators

Fast secure boot with IP protection

Support for Arm TrustZone

Accelerators

High performance pipelined FFT/IFFT engine

FIR, IIR, HAE, SINC offload engines

AEC-Q100 qualified for automotive applications

Figure 1. Processor Block Diagram

SYSTEM CONTROL

FAULT MANAGEMENT

SYSTEM PROTECTION (SPU)

SECURITY AND PROTECTION

Arm® TrustZone® SECURITY

DUAL CRC

WATCHDOGS

THERMAL MONITOR UNIT (TMU)

OTP MEMORY

TRIGGER ROUTING (TRU)

SYS EVENT CORE 0 (GIC)

PROGRAM FLOW

REAL TIME CLOCK (RTC)

CLOCK GENERATION (CGU)

CLOCK, RESET, AND POWER

POWER MANAGEMENT (DPM)

RESET CONTROL (RCU)

WATCHPOINTS (SWU)

Arm® CoreSightTM

DEBUG UNIT

SYSTEM MEMORY

PROTECTION UNIT (SMPU)

CLOCK DISTRIBUTION

UNIT (CDU)

DATA

16

S

L1 SRAM (PARITY)

5 Mb (640 kB)

SRAM/CACHE

32 kB L1 I-CACHE

32 kB L1 D-CACHE

SYSTEM

L2 MEMORY

SYSTEM

ACCELERATION

L3 MEMORY

INTERFACES

DDR3

DDR2

LPDDR1

DDR3

DDR2

LPDDR1

DSP FUNCTIONS

(FFT/IFFT, FIR, IIR, HAE/SINC)

L1 SRAM (PARITY)

5 Mb (640 kB)

SRAM/CACHE

ENCRYPTION/DECRYPTION

L1 CACHE

L2 CACHE

256 kB (PARITY)

DATA

16

SYSTEM CROSSBAR AND DMA SUBSYSTEM

CORE 1

CORE 2

CORE 0

S

PERIPHERALS

3× I

2C

2× LINK PORTS

2× SPI + 1× QUAD SPI

3× UARTs

3× ePWM

8× TIMERS + 1× COUNTER

1× EPPI

ADC CONTROL MODULE

(ACM)

ASYNC MEMORY (16-BIT)

SD/SDIO/eMMC

MLB 3-PIN

2× CAN2.0

2× USB 2.0 HS

MLB 6-PIN

PCIe2.0 (1 lane)

HADC (8 CHAN, 12-BIT)

2× EMAC

SINC FILTER

8x SHARC FLAGS

ASRC

2×4 PAIRS

2×1 S/PDIF Rx/Tx

2×2 PRECISION CLOCK

GENERATORS

FULL SPORT

2×4

2x DAI

2x PIN

BUFFER

SIGNAL ROUTING UNIT (SRU)

G

P

I

O

SRAM

(ECC)

2 Mb

(256 kB)

40–28

6

102–80

10

6

7

8

SYS EVENT CORES 1-2 (SEC)

ROM

2 Mb

(256 kB)

ROM

2 Mb

(256 kB)

Arm

Cortex-A5

®

Similar Part No. - ADSP-SC583

Manufacturer	Part #	Datasheet	Description
Analog Devices	ADSP-SC583	3Mb / 168P	SHARC plus Dual Core DSP with ARM Cortex-A5 Rev. PrF

More results

Similar Description - ADSP-SC583

Manufacturer	Part #	Datasheet	Description
List of Unclassifed Man...	A10S	1Mb / 82P	ARM Cortex-A8 Core
List of Unclassifed Man...	A13	1Mb / 55P	ARM Cortex A8 Core
Analog Devices	ADSP-SC582	3Mb / 168P	SHARC plus Dual Core DSP with ARM Cortex-A5 Rev. PrF
NXP Semiconductors	SAC57D54H	1Mb / 77P	ARM??Cortex-A5, 32-bit CPU Rev. 7, 05/2017
Analog Devices	ADSP-SC570	3Mb / 142P	SHARC Dual-Core DSP with ARM Cortex-A5 6/2018-Rev. A to Rev. B
Analog Devices	ADSP-21591	3Mb / 143P	SHARC Dual-Core DSP with Arm Cortex-A5 5/2021-Rev. PrC to Rev. PrD
List of Unclassifed Man...	DE10-NANO	7Mb / 118P	Cyclone V SoC with Dual-core ARM Cortex-A9
Analog Devices	ADSP-21591	3Mb / 145P	SHARC Dual-Core DSP with Arm Cortex-A5 Rev. A
Analog Devices	ADSP-SC595	3Mb / 134P	SHARC Dual-Core DSP with Arm Cortex-A55 Rev. PrD
Rockchip Electronics Co...	RV1108	2Mb / 68P	Single-core ARM Cortex-A7 Core processor Revision 1.4 June. 2018

More results

ADSP-SC583 Datasheet(PDF) 1 Page - Analog Devices

ADSP-SC583 Datasheet(HTML) 1 Page - Analog Devices

Similar Part No. - ADSP-SC583

Similar Description - ADSP-SC583

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL