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ADSP-SC583 Datasheet(PDF) 4 Page - Analog Devices

Part # ADSP-SC583
Description  SHARC Dual-Core DSP with Arm Cortex-A5
PDF  173 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-SC583 Datasheet(HTML) 4 Page - Analog Devices

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Rev. B
|
Page 4 of 173
|
December 2018
ADSP-SC582/SC583/SC584/SC587/SC589/ADSP-21583/21584/21587
Table 2. Comparison of ADSP-SC58x/ADSP-2158x Processor Features
Processor Feature
ADSP-
SC582
ADSP-
SC583
ADSP-
SC584
ADSP-
SC587
ADSP-
SC589
ADSP-
21583
ADSP-
21584
ADSP-
21587
Arm Cortex-A5 (MHz, Max)
500
500
500
500
500
N/A
N/A
N/A
Arm Core L1 Cache (I, D kB)
32, 32
32, 32
32, 32
32, 32
32, 32
N/A
N/A
N/A
Arm Core L2 Cache (kB)
256
256
256
256
256
N/A
N/A
N/A
SHARC+ Core1 (MHz, Max)
500
500
500
500
500
500
500
500
SHARC+ Core2 (MHz, Max)
N/A
500
500
500
500
500
500
500
SHARC L1 SRAM (kB)
640
384
640
640
640
384
640
640
L2 SRAM (Shared) (kB)
256
256
256
256
256
256
256
256
L2 ROM (Shared) (kB)
512
512
512
512
512
512
512
512
DDR3/DDR2/LPDDR1
Controller (16-bit)
1112
2
1
1
2
USB 2.0 HS + PHY (Host/Device/OTG)
1111
1
N/A
N/A
N/A
USB 2.0 HS + PHY (Host/Device)
N/A
N/A
N/A
1
1
N/A
N/A
N/A
10/100 Std EMAC
N/A
N/A
N/A
1
1
N/A
N/A
N/A
10/100/1000 /AVB EMAC + Timer
IEEE 1588
1111
1
N/A
N/A
N/A
SDIO/eMMC
N/A
N/A
N/A
1
1
N/A
N/A
N/A
PCIe 2.0 (1 Lane)
N/A
N/A
N/A
N/A
1
N/A
N/A
N/A
RTC
N/A
N/A
N/A
1
1
N/A
N/A
1
GPIO Ports
Port A to E
Port A to E
Port A to E Port A to G Port A to G Port A to E Port A to E Port A to G
GPIO + DAI Pins
80 + 28
80 + 28
80 + 28
102 + 40
102 + 40
80 + 28
80 + 28
102 + 40
19 mm × 19 mm Package Options
349-BGA
349-BGA
349-BGA
529-BGA
529-BGA
349-BGA
349-BGA
529-BGA
Table 3. Comparison of ADSP-SC58x/ADSP-2158x Processor Features for Automotive
Processor Feature
ADSP-SC582W ADSP-SC583W ADSP-SC584W ADSP-SC587W ADSP-21583W ADSP-21584W
Arm Cortex-A5 (MHz, Max)
450
450
500
500
N/A
N/A
Arm Core L1 Cache (I, D kB)
32, 32
32, 32
32, 32
32, 32
N/A
N/A
Arm Core L2 Cache (kB)
256
256
256
256
N/A
N/A
SHARC+ Core1 (MHz, Max)
450
450
500
500
450
500
SHARC+ Core2 (MHz, Max)
N/A
450
500
500
450
500
SHARC L1 SRAM (kB)
640
384
640
640
384
640
L2 SRAM (Shared) (kB)
256
256
256
256
256
256
L2 ROM (Shared) (kB)
512
512
512
512
512
512
DDR3/DDR2/LPDDR1
Controller (16-bit)
1112
1
1
USB 2.0 HS + PHY (Host/Device/OTG)
1111
N/A
N/A
USB 2.0 HS + PHY (Host/Device)
N/A
N/A
N/A
1
N/A
N/A
10/100 Std EMAC
N/A
N/A
N/A
1
N/A
N/A
10/100/1000/AVB EMAC + Timer
IEEE 1588
1111
N/A
N/A
SDIO/eMMC
N/A
N/A
N/A
1
N/A
N/A
PCIe 2.0 (1 Lane)
N/A
N/A
N/A
N/A
N/A
N/A
MLB 3-Pin/6-Pin
1111
1
1
RTC
N/A
N/A
N/A
1
N/A
N/A
GPIO Ports
Port A to E
Port A to E
Port A to E
Port A to G
Port A to E
Port A to E
GPIO + DAI Pins
80 + 28
80 + 28
80 + 28
102 + 40
80 + 28
80 + 28
19 mm × 19 mm Package Options
349-BGA
349-BGA
349-BGA
529-BGA
349-BGA
349-BGA



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