VT8235 datasheet(25/145 Pages) VIA

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VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-19-

Pin Descriptions

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Power Management and Event Detection

Signal Name

Pin # I/O Signal Description

PWRBTN#

AD2

Power Button.

Used by the Power Management subsystem to monitor an external

system on/off button or switch. Internal logic powered by VSUS33.

SLPBTN#

/ GPIO21

/ ACSDIN3 / PCS1#

Sleep Button.

Used by the Power Management subsystem to monitor an external sleep

button or switch. RxE4[6] = 1, 80[6] = 1, E5[2] = 0 and PMIO Rx4C[21] = 1

RSMRST#

AD5

Resume Reset.

Resets the internal logic connected to the VSUS33 power plane and

also resets portions of the internal RTC logic. Internal logic powered by VBAT.

EXTSMI#

/ GPI2

AA1 IOD External System Management Interrupt. When enabled to allow it, a falling edge on

this input causes an SMI# to be generated to the CPU to enter SMI mode. (10K PU to

VSUS33 if not used) (3.3V only)

PME#

Power Management Event.

(10K PU to VSUS33 if not used)

SMBALRT#

AB2

SMB Alert

. When programmed to allow it (SMB I/O Rx8[3]=1), assertion generates

an IRQ, SMI, or power management event. (10K PU to VSUS33 if not used)

LID#

/ GPI4

AC1

Notebook Computer Display Lid Open / Closed Monitor.

Used by the Power

Management subsystem to monitor the opening and closing of the display lid of

notebook computers.

Can be used to detect either low-to-high or high-to-low

transitions to generate an SMI#. (10K PU to VSUS33 if not used)

INTRUDER#

/ GPI16

AD3

Intrusion Indicator.

The value of this bit may be read at PMIO Rx20[6]

THRM#

/ GPI18

/ AOLGPI

Thermal Alarm Monitor.

Rx8C[3] = 1. Rising or falling edges (selectable by PMIO

Rx2C[6]) may be detected to set status at PMIO Rx20[10]. Setting of this status bit

may then be used to generate an SCI or SMI. THRM# may also be used to enable duty

cycle control of stop-clock (STPCLK#) to automatically limit maximum temperature

(see Device 17 Function 0 Rx8C[7-3]).

RING#

/ GPI3

Ring Indicator.

May be connected to external modem circuitry to allow the system to

be re-activated by a received phone call. (10K PU to VSUS33 if not used)

BATLOW#

/ GPI5

Battery Low Indicator.

(10K PU to VSUS33 if not used) (3.3V only)

CPUSTP#

/ GPO5

AC7

CPU Clock Stop

(RxE4[0] = 0). Signals the system clock generator to disable the

CPU clock outputs. Not connected if not used.

PCISTP#

/ GPO6

AF6

PCI Clock Stop

(RxE4[1] = 0). Signals the system clock generator to disable the PCI

clock outputs. Not connected if not used.

SUSA#

/ GPO1

AA2

Suspend Plane A Control

(Rx94[2]=0). Asserted during power management POS,

STR, and STD suspend states. Used to control the primary power plane. (10K PU to

VSUS33 if not used)

SUSB#

/ GPO2

AF2

Suspend Plane B Control

(Rx94[3]=0). Asserted during power management STR and

STD suspend states. Used to control the secondary power plane. (10K PU to VSUS33

if not used)

SUSC#

AF1

Suspend Plane C Control.

Asserted during power management STD suspend state.

Used to control the tertiary power plane. Also connected to ATX power-on circuitry.

(10K PU to VSUS33 if not used)

SUSST1#

/ GPO3

Suspend Status 1

(Rx94[4] = 0). Typically connected to the North Bridge to provide

information on host clock status. Asserted when the system may stop the host clock,

such as Stop Clock or during POS, STR, or STD suspend states. Connect 10K PU to

VSUS33.

SUSCLK

AB1

Suspend Clock.

32.768 KHz output clock for use by the North Bridge (e.g., VT8633

or VT8366) for DRAM refresh purposes. Stopped during Suspend-to-Disk and Soft-

Off modes. Connect 10K PU to VSUS33.

CPUMISS

/ GPI17

CPU Missing.

Used to detect the physical presence of the CPU chip in its socket.

High indicates no CPU present. Connect to the CPUMISS pin of the CPU socket. The

state of this pin may be read in the SMBus 2 registers. This pin may be used as

CPUMISS and GPI17 at the same time.

AOLGPI

/ GPI18

/ THRM#

Alert On LAN.

The state of this pin may be read in the SMBus 2 registers. This pin

may be used as AOLGPI, GPI18 and THRM# all at the same time.

VT8235 Datasheet(PDF) 25 Page - VIA Technologies, Inc.

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