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VT8235 Datasheet(PDF) 36 Page - VIA Technologies, Inc. |
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VT8235 Datasheet(HTML) 36 Page - VIA Technologies, Inc. |
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36 / 145 page  VT8235 V-Link South Bridge Revision 1.22 October 24, 2002 -30- Register Overview UrpuytvrÃDp XrÃ8rp I/O Space Power Management Registers Offset Basic Control / Status Registers Default Acc 1-0 Power Management Status 0000 WC 3-2 Power Management Enable 0000 RW 5-4 Power Management Control 0000 RW 6-7 -reserved- 00 — B-8 Power Management Timer 0000 0000 RW C-F -reserved- 00 — Offset Processor Registers Default Acc 13-10 Processor and PCI Bus Control 0000 0000 RW 14 Processor LVL2 00 RO 15 Processor LVL3 00 RO 16-1F -reserved- 00 — Offset General Purpose Registers Default Acc 21-20 General Purpose Status 0000 WC 23-22 General Purpose SCI Enable 0000 RW 25-24 General Purpose SMI Enable 0000 RW 26-27 -reserved- 00 — Offset Generic Registers Default Acc 29-28 Global Status 0000 WC 2B-2A Global Enable 0000 RW 2D-2C Global Control 0010 RW 2E -reserved- 00 — 2F SMI Command 00 RW 33-30 Primary Activity Detect Status 0000 0000 WC 37-34 Primary Activity Detect Enable 0000 0000 RW 3B-38 GP Timer Reload Enable 0000 0000 RW 3C-3F -reserved- 00 — Offset General Purpose I/O Registers Default Acc 40 Extended I/O Trap Status 00 WC 41 -reserved- 00 — 42 Extended I/O Trap Enable 00 RW 43-44 -reserved- 00 — 45 SMI / IRQ / Resume Status 00 RO 46-47 -reserved- 00 — 4B-48 GPI Port Input Value input RO 4F-4C GPO Port Output Value FFFFCFFF RW 50 GPI Pin Change Status 00 RW 51 -reserved- 00 — 52 GPI Pin Change SCI/SMI Select 00 RW 53-57 -reserved- 00 — 59-58 I/O Trap PCI I/O Address 0000 RO 5A I/O Trap PCI Command / Byte Ena 00 RO 5B -reserved- 00 — 5C CPU Performance Control 00 RW 5D-FF -reserved- 00 — I/O Space System Management Bus Registers Offset System Management Bus Default Acc 0 SMBus Host Status 00 WC 1 SMBus Slave Status 00 RW 2 SMBus Host Control 00 RW 3 SMBus Host Command 00 RW 4 SMBus Host Address 00 RW 5 SMBus Host Data 0 00 RW 6 SMBus Host Data 1 00 RW 7 SMBus Block Data 00 RW 8 SMBus Slave Control 00 RW 9 SMBus Shadow Command 00 RO A-B SMBus Slave Event 0000 RW C-D SMBus Slave Data 0000 RO E -reserved- 00 — F SMBus GPIO Slave Address 00 RW System Management Bus Command Codes Code System Management Bus Default Acc 00 SMBus GPIO Slave Input Data — RO 01 SMBus GPIO Slave Output Data 00 RW 02 SMBus GPIO Slave Polarity Inversion F0 RW 03 SMBus GPIO Slave I/O Configuration FF RW |
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