VT8235 datasheet(67/145 Pages) VIA

67 / 145 page

VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-61-

Device 17 Function 0 Bus Control Registers

UrpuytvrÃDp

XrÃ8rp

Device 17 Function 0 Registers – Bus Control and Power

Management

All registers are located in the device 17 function 0

configuration space of the VT8235.

These registers are

accessed through PCI configuration mechanism #1 via I/O

address 0CF8h / 0CFCh.

PCI Configuration Space Header

Offset 1-0 - Vendor ID (1106h)......................................... RO

Offset 3-2 - Device ID (3177h) .......................................... RO

Offset 5-4 - Command.......................................................RW

15-8 Reserved

........................................ always reads 0

Address / Data Stepping

Disable

Enable ................................................... default

6-4

Reserved

........................................ always reads 0

Special Cycle Enable

.......................RW, default = 0

Bus Master

........................................ always reads 1

Memory Space

.................................... RO, reads as 1

I/O Space

........................................ RO, reads as 1

Offset 7-6 - Status ...........................................................RWC

Detected Parity Error

....................write one to clear

Signalled System Error

...................... always reads 0

Signalled Master Abort

.................write one to clear

Received Target Abort

...................write one to clear

Signalled Target Abort

..................write one to clear

10-9 DEVSEL# Timing

.................... fixed at 01 (medium)

Data Parity Detected

Reads 1 if PERR# is asserted (driven or observed) or

a bus master data parity error occurred.

Fast Back-to-Back Capable

............... always reads 0

6-0

Reserved

........................................ always reads 0

Offset 8 - Revision ID (nnh) .............................................. RO

7-0

Revision ID

Offset 9 - Program Interface (00h) ................................... RO

Offset A - Sub Class Code (01h) ....................................... RO

Offset B - Class Code (06h) ............................................... RO

Offset E - Header Type (80h)............................................ RO

7-0

Header Type Code.........

80h (Multifunction Device)

Offset F - BIST (00h) ......................................................... RO

Offset 2F-2C - Subsystem ID ............................................ RO

Use offset 70-73 to change the value returned.

VT8235 Datasheet(PDF) 67 Page - VIA Technologies, Inc.

VT8235 Datasheet(HTML) 67 Page - VIA Technologies, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL