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VT8235 Datasheet(PDF) 71 Page - VIA Technologies, Inc.

Part # VT8235
Description  V-LINK CLIENT HIGHLY INTEGRATED SOUTH BRIDGE
PDF  145 Pages
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Manufacturer  VIA [VIA Technologies, Inc.]
Direct Link  https://www.viatech.com/en/
Logo VIA - VIA Technologies, Inc.

VT8235 Datasheet(HTML) 71 Page - VIA Technologies, Inc.

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VT8235 V-Link South Bridge
Revision 1.22 October 24, 2002
-65-
Device 17 Function 0 Bus Control Registers
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Function Control
Offset 50 – Function Control 1 (09h) ...............................RW
7
Device 17 Function 6 MC97
0
Enable.................................................... default
1
Disable
6
Device 17 Function 5 AC97
0
Enable.................................................... default
1
Disable
5
Device 16 Function 1 USB 1.1 UHCI Ports 2-3
0
Enable.................................................... default
1
Disable
4
Device 16 Function 0 USB 1.1 UHCI Ports 0-1
0
Enable.................................................... default
1
Disable
3
Device 17 Function 1 IDE
0
Enable
1
Disable ..................................................default
2
Device 16 Function 2 USB 1.1 UHCI Ports 4-5
0
Enable.................................................... default
1
Disable
1
Device 16 Function 4 USB 2.0 EHCI
0
Enable.................................................... default
1
Disable
0
Internal Audio ..................................................... RO
0
Disable
1
Enable....................................................default
Offset 51 – Function Control 2 (0Dh).............................. RW
7-6
Reserved
........................................always reads 0
5
Internal LAN Controller Clock Gating
When bit-4 of this register is disabled, the LAN
function is disabled but the LAN controller clock is
not gated automatically.
This bit controls whether
the clock is actually gated.
0
Disable ................................................... default
1
Enable
4
Internal LAN Controller
0
Disable ................................................... default
1
Enable
3
Internal RTC
0
Disable
1
Enable ................................................... default
2
Internal PS2 Mouse
0
Disable
1
Enable ................................................... default
1
Internal KBC Configuration
0
Disable ports 2E / 2F offsets E0-EF ...... default
1
Enable ports 2E / 2F offsets E0-EF
0
Internal KBC
0
Disable
1
Enable ................................................... default
0 / Disable
1 / Enable
Pin
(External KBC)
(Internal KBC)
AF12
KBCS#
ROMCS#
V2
KBRC
KBDT
V3
KA20G
KBCK
W1
IRQ12
MSDT
W2
IRQ1
MSCK



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