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PM9313 Datasheet(PDF) 89 Page - PMC-Sierra, Inc |
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PM9313 Datasheet(HTML) 89 Page - PMC-Sierra, Inc |
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89 / 343 page ![]() PM9311/2/3/5 ETT1™ CHIP SET PMC-2000164 ISSUE 3 ENHANCED TT1™ SWITCH FABRIC Released Data Sheet PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 85 PMC-Sierra, Inc. 1.8.1 Initial Power-on: • Wait for voltage ramp-up • Suggested: • Initialize the OOB satellite FPGA • Reset Enhanced Port Processor • Reset Dataslices • Reset Scheduler • Reset Crossbar • Enable PLLs on all devices (turn off PLL reset) • Program Dataslices' DINBY and DOUTBY to 3 • Set interrupt masks (disable all except AIB ready up and external link interrupts) on EPP & DSs • Set primary Crossbar in DSs to one that exists • Program 8b10b tables of DSs • Program pre-defined switch to Linecard Control Packets location in all DSs. ( See section 3.3, table 28) • EPP Waiting Scheduler Request Count Memory EWSRCT address offset 1C000-1DFFCh: After resetting an EPP, write 00000000h to address offsets 1D000h through 1D7FCh in that EPP (a total of 512 OOB writes). Whan all EPPs are resetsimultaneously (using a broadcast OOB write to the EPP Reset and Control register), 512 broadcast OOB writes can be used to reset those locations in all EPPs. • Release VCSEL and PIN diode resets on DSs • Suggested: • enable clock phase shifting on Serdes, • configure Serdes loopback controls for normal operation, • enable Serdes synchronization, • send idle-not-rdy from linecard • Enable DS 8b10b encoder |
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