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PM9313 Datasheet(PDF) 20 Page - PMC-Sierra, Inc |
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PM9313 Datasheet(HTML) 20 Page - PMC-Sierra, Inc |
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20 / 343 page ![]() 16 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE PM9311/2/3/5 ETT1™ CHIP SET PMC-2000164 ISSUE 3 ENHANCED TT1™ SWITCH FABRIC Released Data Sheet PMC-Sierra, Inc. 1.1.2 The Switch Core Model The ETT1 Chip Set is designed to provide a switch core, not a complete packet switch system. A complete switch consists of one or more switch cores, together with a number of linecards. Each linecard connects to one port in the core. The linecard includes a physical interface (fiber, co-axial cable) to a transmission system such as SONET/SDH or Ethernet. The linecard analyzes incoming cells or packets and determines the appropriate egress port and priority. The linecard contains any cell/packet queues that are needed to allow for transient congestion through the switch. The ETT1 switch core operates on fixed size cells. If the linecard transmission system uses variable length packets, or cells of a size different from those used in the core, then the linecard is responsible for performing any segmentation and reassembly that is needed. Figure 1 illustrates this generic configuration. Figure 1. The Basic Components of a Switch Built Around the ETT1 Chip Set. The ETT1 Chip Set has been designed to allow for up to 200 feet (70 meters) of physical separation between the ETT1 core and the linecard. The LCSTM(Linecard to Switch) protocol is used between the ETT1 core and the linecard to ensure lossless transfer of cells between the two entities. However, while the LCS protocol must be implemented, the physical separation is not mandatory; the linecard could reside on the same physical board as the ETT1 port devices. The switch core has two main interfaces. One is the interface between the linecard and the core port, described in the LCS Protocol section. SONET/SDH Ethernet.... SONET/SDH Ethernet.... ETT1 Switch Core CPU OOB Bus LCS Protocol Linecard 0 Linecard 31 port 0 port 0 ETT1 Chip Set |
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