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TMPR3911 Datasheet(PDF) 201 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 201 Page - Toshiba Semiconductor |
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201 / 462 page  Chapter 8 Interrupt Module 8-1 8. Interrupt Module 8.1 Overview The Interrupt Module within the TMPR3911/12 contains logic for reading, enabling, and clearing all of the interrupt sources. These interrupts are either generated from internal TMPR3911/12 modules or from edge transitions on external signal pins. All of these latter interrupt types generate a separate positive and negative edge interrupt. The status (logic state) of each interrupt is readable, allowing any interrupt event to be polled, if desired. Each interrupt status signal is also gated with the corresponding interrupt enable bit in order to generate the overall IRQ output to the CPU. The interrupt status register is reset using the corresponding clear bit from the corresponding clear interrupt register. |
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