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TMPR3916 Datasheet(PDF) 53 Page - Toshiba Semiconductor |
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TMPR3916 Datasheet(HTML) 53 Page - Toshiba Semiconductor |
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53 / 225 page ![]() Chapter 2 Memory Controller (MC) Preliminary 2-4 Two asynchronous SRAMs connected to one channel of the TMPR3916 : CS[x] A WR* RD* BE[3]* BE[2]* BE[1]* BE[0]* D[31:16] D[15:0] CE* A WE* OE* LB* UB* D[15:0] CE* A WE* OE* LB* UB* D[15:0] Figure 2.2.2 2 × 16-Bit Asynchronous SRAM Connected to One 32-Bit Memory Channel Connection of an external slave device with a data width of 16 bit : SYSCLK CS[x]* A[15:2] BSTART* LAST* BURST* WR* ACK BUSERR* BE[1:0]* D[15:0] SYSCLK CS* A BSTART* LAST* BURST* RW* ACK* BUSERR* BE[1:0] D[15:0] Figure 2.2.3 16-Bit External Slave Device Connected to Memory Channel |
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