TMPR3916 datasheet(65/225 Pages) TOSHIBA

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Chapter 2 Memory Controller (MC)

Preliminary

2-16

2.5.6

Address Mask Configuration

The following example provides a step by step approach that shows how to configure base-address

and address-masks for a memory channel.

For the example it is assumed that two 128 MBit SDRAM devices with 16 Bit connectivity are

connected to one of the SDRAM Controller channels.

To configure the address mask proceed in the following order:

Select a base-address for the memory area to be mapped.

In this example, we choose 0x5000_0000 as the physical base address for the memory area to be

mapped.

Determine how much memory is connected to the memory channel:

In this example 2 devices with 16 MBytes each => 32 MByte

Determine how many address bits are required to address 33.554.432 Bytes

log2 (33554432) = 25

This means that 25 address bits are required for the channel

Therefore, the correct address mask is 0xfe00.

In this case, the memory area from 0x5000_0000 to 0x51ff_ffff will be mapped to the SDRAM

channel. The SDRAM controller will respond only to bus accesses that refer to an address within this

area.

Starting from this setup also mirror areas and protected areas can be generated:

Example for mirroring:

An address mask 0x7e00 will map the same physical memory twice to the addresses:

0x5000_0000 - 0x51ff_ffff and

0xD000_0000 - 0xD1ff_ffff

Example for protection:

An address mask 0xff00 will leave the memory area

0x5000_0000 - 0x50ff_ffff accessible, while the second half

0x5100_0000 - 0x51ff_ffff is protected.

Please note that the SDRAM always refers to physical address space, which might differ from the

virtual address space used within a computer program.

TMPR3916 Datasheet(PDF) 65 Page - Toshiba Semiconductor