TMPR3916 datasheet(83/225 Pages) TOSHIBA

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Chapter 3 Graphics Display Controller (GDC)

Preliminary

3-4

The minimum value to be stored in MWRx is equal to the number of dots per line in the frame buffer

divided by 4 (in case of layers A and B, 8 for C and D and 2 for layer E) and rounded to the next greater

integer value (MWRx stores numbers of 32 bit words). In practice, it is advisable to have a certain space

between two adjacent lines. Therefore the practical memory size is larger than the one requested to

cover just one layer. The frame buffer contents represent the address of the color palette which contains

the displayed colors for the respective layer:

32 bit frame buffer

Line 1

Dot 1

Line 1

Dot 2

Line 1

Dot 3

Line 1

Dot 4

Line 1

Dot n-1

Line 1

Dot n-2

Line N

Dot 1

Line N

Dot 2

Line N

Dot 3

Line N

Dot 4

Line N

Dot n-2

Line N

Dot n-1

16 bit-wide colour palette

To digitalout or VIEWDAC

Line 1

Dot n

Line N

Dot n

Figure 3.1.3 Frame Buffer and Color Palette in Case of Layers A or B

In case of layers C and D, the contents of register MWRx must be adjusted taking into consideration

that there are 8 dots in a 32 bit word. Therefore the minimum value is given by the number of dots in a

line divided by 8.

32 bit frame buffer

Line 1

Dot 1

Line 1

Dot 2

Line 1

Dot 3

Line 1

Dot 4

Line 1

Dot n-1

Line 1

Dot n-2

Line N

Dot 1

Line N

Dot 2

Line N

Dot 3

Line N

Dot 4

Line N

Dot n-2

Line N

Dot n-1

16 bit colour palette

To digitalout or VIEWDAC

Line 1

Dot 5

Line 1

Dot 6

Line 1

Dot 7

Line 1

Dot 8

Line 1

Dot n

Line N

Dot 5

Line N

Dot 6

Line N

Dot 7

Line N

Dot 8

Line N

Dot n

Figure 3.1.4 Frame Buffer and Color Palette in Case of Layers C or D

In case of layer E, each 32 bit word is storing the data of 2 dots. So the minimum number to store in

MWRA (E layer uses A layer registers) is equal to the number of dots in a line divided by 2. No color

palette is needed for layer E.

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